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CYUSB302X 数据表(PDF) 13 Page - Cypress Semiconductor |
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CYUSB302X 数据表(HTML) 13 Page - Cypress Semiconductor |
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13 / 34 page  Document Number: 001-55190 Rev. *L Page 13 of 34 CYUSB302x H10 VI02 I/O GPIO[41] S0_CMD S0_CMD GPIO H9 VI02 I/O GPIO[42] S0_CLK S0_CLK GPIO G11 VI02 I/O GPIO[43] S0_WP S0_WP GPIO G10 VI02 I/O GPIO[44] S0S1_INS S0S1_INS GPIO G9 VI02 I/O GPIO[45] MMC0_RST_OUT GPIO GPIO S1-Port 8b MMC SD+UART SD+SPI SD+GPIO GPIO GPIO+UART +I2S SD+I2S UART+SPI+I 2S F11 VI03 I/O GPIO[46] S1_SD0 S1_SD0 S1_SD0 S1_SD0 GPIO GPIO S1_SD0 UART_RTS F10 VI03 I/O GPIO[47] S1_SD1 S1_SD1 S1_SD1 S1_SD1 GPIO GPIO S1_SD1 UART_CTS E11 VI03 I/O GPIO[48] S1_SD2 S1_SD2 S1_SD2 S1_SD2 GPIO GPIO S1_SD2 UART_TX D12 VI03 I/O GPIO[49] S1_SD3 S1_SD3 S1_SD3 S1_SD3 GPIO GPIO S1_SD3 UART_RX D11 VI03 I/O GPIO[50] S1_CMD S1_CMD S1_CMD S1_CMD GPIO I2S_CLK S1_CMD I2S_CLK E10 VI03 I/O GPIO[51] S1_CLK S1_CLK S1_CLK S1_CLK GPIO I2S_SD S1_CLK I2S_SD E9 VI03 I/O GPIO[52] S1_WP S1_WP S1_WP S1_WP GPIO I2S_WS S1_WP I2S_WS D10 VI04 I/O GPIO[53] S1_SD4 UART_RTS SPI_SCK GPIO GPIO UART_RTS GPIO SPI_SCK D9 VI04 I/O GPIO[54] S1_SD5 UART_CTS SPI_SSN GPIO GPIO UART_CTS I2S_CLK SPI_SSN B12 VI04 I/O GPIO[55] S1_SD6 UART_TX SPI_MISO GPIO GPIO UART_TX I2S_SD SPI_MISO C12 VI04 I/O GPIO[56] S1_SD7 UART_RX SPI_MOSI GPIO GPIO UART_RX I2S_WS SPI_MOSI E12 VI04 I/O GPIO[57] MMC1_RST _OUT GPIO GPIO GPIO GPIO I2S_MCLK I2S_MCLK I2S_MCLK U-Port C3 VBUS/VBATT I OTG_ID USB OTG Identification A10 U3RXVDDQ I SSRXM USB 3.0 SuperSpeed Receive Minus B10 U3RXVDDQ I SSRXP USB 3.0 SuperSpeed Receive Plus A8 U3TXVDDQ O SSTXM USB 3.0 SuperSpeed Transmit Minus B8 U3TXVDDQ O SSTXP USB 3.0 SuperSpeed Transmit Plus A4 VBUS/VBATT I/O DP USB (HS/FS) Data Plus A2 VBUS/VBATT I/O DM USB (HS/FS) Data Minus B4 VBUS/VBATT I/O SWDP USB (HS/FS) Switch Interface Data Plus B2 VBUS/VBATT I/O SWDM USB (HS/FS) Switch Interface Data Minus Crystal/Clocks A7 CVDDQ I FSLC[0] Frequency Select 0 B6 AVDD I/O XTALIN Crystal Oscillator Input B5 AVDD I/O XTALOUT Crystal Oscillator Output F9 CVDDQ I FSLC[1] Frequency Select 1 B7 CVDDQ I FSLC[2] Frequency Select 2 C5 CVDDQ I CLKIN External Clock Input C6 CVDDQ I CLKIN_32 32.76-kHz Clock Input for Watchdog Timer Other D6 I2C_VDDQ I/O I2C_GPIO[58] SCL (Serial Clock) for I2C Bus Interface D2 I2C_VDDQ I/O I2C_GPIO[59] SDA (Serial Data) for I2C Bus Interface F8 I2C_VDDQ I TDI TDI (Test Data In) for JTAG Interface C2 I2C_VDDQ O TDO TDO (Test Data Out) for JTAG Interface C1 I2C_VDDQ O TRST# TRST (Test Reset) for JTAG Interface D5 I2C_VDDQ O TMS TMS (Test Mode Select) for JTAG Interface D3 I2C_VDDQ O TCK TCK (Test Clock) for JTAG Interface E8 I2C_VDDQ O O[60] Charger Detect Output Power Table 8. Pin List (continued) Pin Power Domain I/O Name Description |
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