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MB91F525FHDPMC 数据表(PDF) 55 Page - Cypress Semiconductor |
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MB91F525FHDPMC 数据表(HTML) 55 Page - Cypress Semiconductor |
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55 / 280 page ![]() Document Number: 002-04662 Rev. *F Page 55 of 280 MB91520 Series 9. I/O Map The following I/O map shows the relationship between memory space and registers for peripheral resources. Legend of I/O Map Read/Write attribute (R: Read W: Write) Address Address offset value/ register name Block +0 +1 +2 +3 000090H BT1TMR[R] H 0000000000000000 BT1TMCR[R/W]B,H,W 00000000 00000000 Base timer 1 000094 H - BT1STC[R/W] B 00000000 - - 000098 H BT1PCSR/BT1PRLL[R /W] H 0000000000000000 BT1PDU T/BT1PRLH/BT1DTBF[R/W] H 0000000000000000 00009C H BTSEL[R/W] B ----000 0 - BTSSSR[W] B,H -------- ------11 0000A0 H ADERH [R/W]B, H, W 00000000 00000000 ADERL [R/W]B, H, W 00000000 00000000 A/D converter 0000A4 H ADCS1 [R/W] B, H,W 00000000 ADCS0 [R/W] B, H,W 00000000 ADCR1 [R] B, H,W ------XX ADCR0 [R] B, H,W XXXXX XXX 0000A8 H ADCT1 [R/W] B, H,W 00010000 ADCT0 [R/W] B, H,W 00101100 ADSCH [R/W] B, H,W ---00000 ADECH [R/W] B, H,W ---00000 Data access attribute B: Byte H: Half-word W: Word (Note)The access by the data access attribute not described is disabled. Initial register value after reset The initial register value after reset indicates as follows: · "1": Initial value "1" · "0": Initial value "0" · "X": Initial value undefined · "-": Reserved bit/Undefined bit · "*": Initial value "0" or "1" according to the setting Note: The access to addresses not described is disabled. |
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