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AC101L-DS00-R 数据表(PDF) 32 Page - Broadcom Corporation.

部件名 AC101L-DS00-R
功能描述  Ultra Low-Power 10/100 Ethernet Transceiver with Auto-MDIX
PDF  54 Pages
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制造商  BOARDCOM [Broadcom Corporation.]
网页  http://www.broadcom.com
标志 BOARDCOM - Broadcom Corporation.

AC101L-DS00-R 数据表(HTML) 32 Page - Broadcom Corporation.

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AC101L
Preliminary Data Sheet
8/9/04
B roa dcom Co rpo rat ion
Page 22
Common Registers
Document
AC101L-DS06-R
REGISTER 24: CRC FOR RECENT RECEIVED PACKET
COMMON REGISTERS
The following registers are mapped to Reg28-31 on the TP PHY. Reg28.[15:12] is used as page selection. There are multiple
pages of Reg29-31, depends on the value of Reg28[15:12].
COMMON REGISTER 0 (MAP TO REG28) MODE CONTROL REGISTER
23.6
MDIX state
Only valid when register 23.7 is set to 1.
0 = MDI
1= MDIX
RW
0
23.5
Reserved
–
RO
0
23.[4:0]
Reserved
–
RO
XXXXX
Table 21: Register 24: CRC for Recent Received Packet
Bit
Name
Description
Mode
Default
24.[15:0]
CRC16
Displays CRC16 value. For system-level test purposes.
RC
0000H
Table 22: Common Register 0 (Map to Reg. 28) Mode Control Register
Bit
Name
Description
Mode
Default
A.28.[15:12
]
Page Selection
Selects multiple common register pages.
RW
0000
A.28.[11:7]
Reserved
Reserved.
RO
0000
A.28.6
MII_enable
1 = Enables MII interface.
RW
1
A.28.5
Reserved
Reserved.
RO
0
A.28.4
Reserved
Reserved.
RW
0
A.28.3
Reserved
Reserved.
RO
0
A.28.2
Act select
Selects activity event.
0 = Receive activity.
1 = TX or RX activity.
RW
1
A.28.1
Reserved
–
RO
0
A.28.0
Reserved
–
RO
0
Table 20: Register 23: Operation Mode Register (Cont.)
Bit
Name
Description
Mode
Default



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