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AC101L-DS00-R 数据表(PDF) 44 Page - Broadcom Corporation. |
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AC101L-DS00-R 数据表(HTML) 44 Page - Broadcom Corporation. |
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44 / 54 page ![]() AC101L Preliminary Data Sheet 8/9/04 B roa dcom Co rpo rat ion Page 34 10BASE-T MII Receive System Timing Document AC101L-DS06-R 10BASE-T MII RECEIVE SYSTEM TIMING Table 41: 10BASE-T MII Receive System Timing Parameter Symbol Conditions Min Typ Max Units RX_CLK period tCK – 399.98 400.00 400.02 ns RX_CLK high period tCKH – 180.00 200.00 220.00 ns RX_CLK low period tCKL – 180.00 200.00 220.00 ns SOP to CRS tRCSA – 80 – 150 ns SOP to COL tRCLA RPTR is logic low. 80 – 150 ns EOP to !RXDV tRDVD RPTR is logic low. 120 – 140 ns EOP to !CRS tRCSD RPTR is logic low. 130 – 190 ns EOP to !COL tRCLD RPTR is logic low. 125 – 185 ns RX propagation delay tRDVA From RXIP/N to RXD[3:0]. 180 – 250 ns RXD[3:0], RXDV assert: Output delay tpLH10 From rising edge RX_CLK. 50 – 350 ns RXD[3:0], RXDV de-assert: invalid tpHL10 From rising edge RX_CLK. 50 – 350 ns |
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