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BT8376EPF 数据表(PDF) 74 Page - Synaptics Incorporated. |
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BT8376EPF 数据表(HTML) 74 Page - Synaptics Incorporated. |
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74 / 323 page ![]() 2.0 Circuit Description Bt8370/8375/8376 2.7 Transmit System Bus Fully Integrated T1/E1 Framer and Line Interface 2-46 Conexant N8370DSE 2.7 Transmit System Bus The Transmit System Bus (TSB) consists of a timebase, slip buffer, signaling buffer, and transmit framer (Figure 2-23). It provides a high-speed serial interface between the XMTR and system bus. The system bus is compatible with the Mitel ST-Bus, the PEB Bus, and the AT&T CHI Bus. TSB directly interfaces to other Conexant devices with no need for external circuitry. The TSB contains the following six pins: Transmit System Bus Clock (TSBCKI), Transmit PCM Data (TPCMI), Transmit Signaling Data (TSIGI), Transmit Frame Sync (TFSYNC), Transmit Multiframe Sync (TMSYNC), and Transmit time slot Indicator (TINDO). See Figure 2-24 for the relationship between these signals. These pins are further defined in Table 1-1, Hardware Signal Definitions. Figure 2-23. TSB Interface Block Diagram TSIG Local TSIG Buffer TSIGI TPCMI TSLIP Buffer TINDO TFSYNC TMSYNC Transmit Framer TSB Timebase TPHASE Local Channel Loopback Remote Channel Loopback From Transmitter TNRZ CLADO CLADI RSBCKI TSBCKI TXDATA From CLADO Prior to Output Buffer I/O from Pins |
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