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DS3151 数据表(PDF) 45 Page - Dallas Semiconductor

部件名 DS3151
功能描述  Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs
PDF  60 Pages
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制造商  DALLAS [Dallas Semiconductor]
网页  https://www.maximintegrated.com/en.html
标志 DALLAS - Dallas Semiconductor

DS3151 数据表(HTML) 45 Page - Dallas Semiconductor

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DS3151/DS3152/DS3153/DS3154 Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs
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Table 13-I. JTAG Interface Timing
(VDD = 3.3V
±5%, TA = -40°C to +85°C.) (Figure 13-5)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
JTCLK Clock Period
t1
1000
ns
JTCLK Clock High/Low Time (Note 23)
t2/t3
50
500
ns
JTCLK to JTDI, JTMS Setup Time
t4
50
ns
JTCLK to JTDI, JTMS Hold Time
t5
50
ns
JTCLK to JTDO Delay
t6
2
50
ns
JTCLK to JTDO High-Z Delay (Note 24)
t7
2
50
ns
JTRST Width Low Time
t8
100
ns
Note 23: Clock can be stopped high or low.
Note 24: Not tested during production test.
Figure 13-5. JTAG Timing Diagram
t1
JTDO
t4
t5
t2
t3
t7
JTDI, JTMS,
JTRST
t6
JTRST
t8
JTCLK



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