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HCS370IP 数据表(PDF) 16 Page - Microchip Technology |
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HCS370IP 数据表(HTML) 16 Page - Microchip Technology |
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16 / 36 page ![]() HCS370 DS41111D-page 16 Preliminary 2002 Microchip Technology Inc. 5.0 SPECIAL FEATURES 5.1 Internal RC Oscillator The HCS370 has an onboard RC oscillator that con- trols all the logic output timing characteristics. The oscillator frequency varies over temperature and volt- age variances, but stays within ±10% of the tuned value. All the timing values specified in this document are subject to this oscillator variation. 5.2 RF Enable and PLL Interface The RFEN pin will be driven high whenever data is transmitted through the DATA pin. The RFEN and DATA outputs also interface with RF PLL’s. The PLL Interface Select (PLLSEL) configura- tion option selects between ASK and FSK interfaces. Figure 5-1 shows the startup sequence for both ASK and FSK interface options. The RFEN signal will go low at the end of the last code word, including the guard time (TG). The power-up time (TPU) is the debounce time plus the step-up regulator ramp up delay if the Wait For Step-Up Regulator (WAIT) configuration option is a ‘1’. The PLL step-up time (TPLL) is also used to update the EEPROM counter. FIGURE 5-1: ASK/FSK INTERFACE 5.3 LED Output The LED pin will be driven low while the HCS370 is transmitting data. The LED On Time (TLEDON) can be selected between 50 ms and 100 ms with the LED On Time Select (LEDOS) configuration option. The LED Off Time (TLEDOFF) is fixed at 500 ms. When the VDD voltage drops below the selected VLOW trip point, the LED will not blink unless the LED Blink (LEDBL) option is set. If LEDBL is set and VDD is low, then the LED will only flash once. Waveforms of the LED behavior are shown in Figure 5-2. For circuits with VDD greater than 3 volts, be sure to limit the LED circuit with a series resistor. The LED out- put can safely sink up to 25 mA but adding an external resistor will conserve battery power. This is an open drain output but it does have a weak pull-up capable of driving a CMOS input. S0 ASK RFEN ASK DATA FSK RFEN FSK DATA TPU TPLL TE CODE WORD CODE WORD CODE WORD CODE WORD VBAT VREG STEP TG Wait 2 seconds for next button if QUEN=1 SLEEP |
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