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AD8375ACPZ-R7 数据表(PDF) 6 Page - Analog Devices |
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AD8375ACPZ-R7 数据表(HTML) 6 Page - Analog Devices |
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6 / 24 page ![]() AD8375 Data Sheet Rev. B | Page 6 of 24 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS VCOM VIN+ VIN– A4 A3 A2 VOUT+ VOUT– VOUT+ VOUT– COMM VPOS NOTES 1. THE EXPOSED PAD IS INTERNALLY CONNECTED TO GROUND. SOLDER TO A LOW IMPEDANCE GROUND PLANE. 2 1 3 4 5 6 18 17 16 15 14 13 AD8375 TOP VIEW (Not to Scale) Figure 3. Pin Configuration Table 4. Pin Function Descriptions Pin No. Mnemonic Description 1 VCOM Common-Mode Pin. Typically bypassed to ground using external capacitor. 2 VIN+ Voltage Input Positive. 3 VIN− Voltage Input Negative. 4 A4 MSB for the 5-Bit Gain Control Interface. 5 A3 MSB − 1 for the Gain Control Interface. 6 A2 MSB − 2 for the Gain Control Interface. 7 A1 LSB + 1 for the Gain Control Interface. 8 A0 LSB for the 5-Bit Gain Control Interface. 9, 10, 12, 13, 23 VPOS Positive Supply Pins. Should be bypassed to ground using suitable bypass capacitor. 11, 14, 20, 21, 22, 24 COMM Device Common (DC Ground). 15, 17 VOUT+ Positive Output Pins (Open Collector). Require dc bias of +5 V nominal. 16, 18 VOUT− Negative Output Pins (Open Collector). Require dc bias of +5 V nominal. 19 PWUP Chip Enable Pin. Enabled with a logic high and disabled with a logic low. EPAD Exposed Pad. The Exposed Pad is internally connected to ground. Solder to a low impedance ground plane. |
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