MPC755 datasheet(30/56 Pages) MOTOROLA

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MPC755 RISC Microprocessor Hardware Specifications, Rev. 6.1

Freescale Semiconductor

Pinout Listings

L2ZZ

G17

High

Output

L2OVDD

LSSD_MODE

Low

Input

—

MCP

B11

Low

Input

OVDD

NC (No Connect)

B3, B4, B5, W19, K9, K11 4, K19 4

——

—

OVDD

D5, D8, D12, E4, E6, E9, E11, F5, H4, J5, L5, M4, P5,

R4, R6, R9, R11, T5, T8, T12

——

OVDD

PLL_CFG[0:3]

A4, A5, A6, A7

High

Input

OVDD

QACK

Low

Input

OVDD

QREQ

Low

Output

OVDD

RSRV

Low

Output

OVDD

SMI

A12

Low

Input

OVDD

SRESET

E10

Low

Input

OVDD

SYSCLK

—

Input

OVDD

Low

Input

OVDD

TBEN

High

Input

OVDD

TBST

A11

Low

I/O

OVDD

TCK

B10

High

Input

OVDD

TDI

High

Input

OVDD

TDO

High

Output

OVdd

TEA

Low

Input

OVDD

TLBISYNC

Low

Input

OVDD

TMS

High

Input

OVDD

TRST

A10

Low

Input

OVDD

Low

I/O

OVDD

TSIZ[0:2]

A9, B9, C9

High

Output

OVDD

TT[0:4]

C10, D11, B12, C12, F11

High

I/O

OVDD

Low

Output

OVDD

VDD

G8, G10, G12, J8, J10, J12, L8, L10, L12, N8, N10, N12

—

2.0 V

Table 15. Pinout Listing for the MPC755, 360 BGA Package (continued)

Signal Name

Pin Number

Active

I/O

I/F Voltage 1

Notes

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