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PCA9558PW 数据表(PDF) 11 Page - NXP Semiconductors |
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PCA9558PW 数据表(HTML) 11 Page - NXP Semiconductors |
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11 / 18 page ![]() Philips Semiconductors Product data PCA9558 8-bit I2C and SMBus I/O port with 5-bit multiplexed/1-bit latched 6-bit I2C EEPROM and 2 k bit EEPROM 2002 May 24 11 SW00645 S 100111 A0 0 AA SLAVE ADDRESS R/W ACKNOWLEDGE FROM SLAVE ACKNOWLEDGE FROM SLAVE COMMAND BYTE EEPROM ADDRESS ACKNOWLEDGE FROM SLAVE A a7 a6 a5 a4 a3 a2 a1 a0 P xxxxxxxx A DUMMY BYTE ACKNOWLEDGE FROM SLAVE GPIO INPUT PORT DATA LATCHED 00010010 PROGRAMMING BEGINS AFTER STOP SEE FIGURE 2 FOR THE NEEDED COMMAND CODE. Figure 15. Read from GPIO Input Port Register and write to 256 byte EEPROM RESET Power-on Reset When power is applied to VDD, an internal power-on reset holds the PCA9558 in a reset state until VDD has reached VPOR. At that point, the reset condition is released and the PCA9558 registers and SMBus state machine will initialize to their default states. External Reset A reset of the GPIO registers can be accomplished by holding the I/O_OUT_LOW pin low for a minimum of Tw. These GPIO registers return to their default states until the I/O_OUT_LOW input is once again high. USING THE PCA9558 ON THE SMBus It is possible to use Intel ® chipsets to communicate with the PCA9558. There are no limitations when the SMBus Controller is communicating with the Mux or the GPIO; however, there are limitations with the 2K serial EEPROM. Because of being able to address any location in the EEPROM block using the 2nd command byte, the designer using the PCA9558 on the SMBus will have to program around it, an easy thing to do. The device designers had to deal with the specifics of addressing the EEPROM and chose the I2C spec and use the 2nd command byte to address any location in the EEPROM block. In order to write to the EEPROM, write the EEPROM address byte in the Data0 byte and the data to be sent should be placed in the Data1 byte. The Intel ® chipset’s Word Data instruction would then send the address, followed by the command register then Data0 (EEPROM address), and then the Data1 (data byte). A read from the EEPROM would be a two step process. The first step would be to do a Write Byte with the EEPROM address in the Data0 register. The second step would be to do a Receive Byte where the data is stored in the command register. Other differences from the SMBus spec: Paragraph 5.5.5 – Read Byte/Word in figure 5–11 – the PCA9558 follows this same command code with one exception, the PCA9558 requires 2 bytes of command before the repeated start. Paragraph 5.5.6 – Process call in figure 5–15 – the PCA9558 read operation is very similar to the SMBus process call. In the PCA9558 read operation you send a start condition – slave address with a write bit – 2 bytes of command code – repeated start – slave address with a read bit – then read data. |
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