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PCA9558PW 数据表(PDF) 15 Page - NXP Semiconductors

部件名 PCA9558PW
功能描述  8-bit I2C and SMBus I/O port with 5-bit multiplexed/1-bit latched 6-bit I2C EEPROM and 2 k bit EEPROM
PDF  18 Pages
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制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

PCA9558PW 数据表(HTML) 15 Page - NXP Semiconductors

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Philips Semiconductors
Product data
PCA9558
8-bit I2C and SMBus I/O port with 5-bit multiplexed/1-bit
latched 6-bit I2C EEPROM and 2 k bit EEPROM
2002 May 24
15
AC CHARACTERISTICS
SYMBOL
PARAMETER
LIMITS
UNIT
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
MUX_INx
⇒ MUX_OUTx
tPLH
21
28
ns
tPHL
7
10
ns
MUX_SELECT
⇒ MUX_OUTx
tPLH
20
28
ns
tPHL
8
12
ns
MUX_OUT_LOW
⇒ NON_MUXED_OUT
tPLH
20
26
ns
tPHL
8
15
ns
MUX_OUT_LOW
⇒ MUX_OUTx
tPLH
20
28
ns
tPHL
7.0
15
ns
tR
Output rise time
1.0
10
ns/V
tF
Output fall time
1.0
5
ns/V
CL
Test load capacitance on outputs
pF
I2C Bus
tSCL
SCL clock frequency
10
400
kHz
tBUF
Bus free time between a STOP and a START condition
1.3
µs
tHD:STA
Hold time (repeated) START condition. After this period, the first clock pulse is
generated
600
ns
tLOW
LOW period of SCL clock
1.3
µs
tHIGH
HIGH period of SCL clock
600
–12
ns
tSU:STA
Set-up time for a repeated START condition
600
–32
ns
tHD:DAT
Data hold time
0
10
ns
tSU:DAT
Data set-up time
100
–100
ns
tSP
Data spike time
0
50
ns
tSU:STO
Set-up time for STOP condition
600
10
ns
tR
Rise time for both SDA and SCL signals (10 – 400 pF bus)
20
300
ns
tI
Fall time for both SDA and SCL signals (10 – 400 pF bus)
20
300
ns
CL
Capacitive load for each bus line
400
pF
TW
Write cycle time1
15
mS
NOTE:
1. WRITE CYCLE time can only be measured indirectly during the write cycle. During this time, the device will not acknowledge its I2C Address.



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