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AC207-DS03-R 数据表(PDF) 13 Page - Broadcom Corporation. |
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AC207-DS03-R 数据表(HTML) 13 Page - Broadcom Corporation. |
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13 / 60 page ![]() Preliminary Data Sheet AC207 07/08/02 B roa dcom Document AC207-DS04-405-R Receive Function Page 3 RECEIVE FUNCTION In 100BASE-TX mode, the receive function implements the reverse order function in the transmit path. It includes a receiver with adaptive equalization and DC restoration, MLT-3 to NRZI conversion, data and clock recovery at 125 MHz, NRZI to NRZ conversion, Serial-to-Parallel conversion, de-scrambling, and 5B to 4B decoding. The receiver circuit starts with a DC bias for the differential RX± inputs, follows with a low-pass filter to filter out high frequency noise from the transmission channel media. An energy detect circuit is also added to determine whether there is any signal energy on the media. This is useful in the power-saving mode. The amplification ratio and slicer threshold is set by the on-chip bandgap reference. In 10BASE-T mode, signal first passes through a 3rd order lowpass filter, which filters all the noise from the cable, board, and transformer. This eliminates the need for a 10BASE-T external filter. A Manchester decoder and a Serial-to Parallel follows to generate the 4-bit data in MII mode. ADAPTIVE EQUALIZER Each of the eight transceivers is designed to accommodate for maximum cable length of 150 meters UTP CAT5 cable. A 150 meters of UTP CAT-5 cable, such as AT&T 1061, has an attenuation of 31 dB at 100 MHz. A typical attenuation of a 100-meter cable is 20 dB. The worst case attenuation is around 24-26 dB defined by TP-PMD. The amplitude and phase distortion from the cable causes inter-symbol interference (ISI) which makes clock and data recovery impossible. Adaptive equalizer is done by matching the inverse transfer function of the twist-pair cable. This is a variable equalizer that changes its equalizer frequency response in accordance to cable length. The cable length is estimated based on comparisons of incoming signal strength against some the known cable characteristics. The equalizer has a monotonically frequency response, and tunes itself automatically for any cable length to compensate for the amplitude and phase distortion incurred from the cable. LINK MONITOR Signal levels are detected through a squelch detection circuitry. A signal detect (SD) circuit follows the equalizer and is asserted high when the peak detector detects a post-equalized signal with peak to ground voltage level larger than 400 mV. This is approximately 40% of a normal signal voltage level. In addition, the energy level must be sustained longer than 2~3 µs in order for the signal detects be asserted. It gets de-asserted approximately 1~2 µs after the energy level is consistently less than 300 mV from peak to ground. In 100BASE-TX mode, when no signal or invalid signal is detected on the receive pair, the link monitor enters in the link fail state where only scrambled idle code is transmitted. When a valid signal is detected for a minimum period of time, the link monitor enters a link pass state and transmit and receive functions are entered. In 10BASE-T mode, a link-pulse detection circuit constantly monitors the RXIP/RXIN pins for the presence of valid link pulses. BASELINE WANDER COMPENSATION The 100BASE-TX data stream is not always DC balanced. The transformer blocks the DC component of the incoming signal, thus the DC offset of the differential receives inputs can wander. The shift in the signal levels, coupled with non-zero rise and fall times of the serial stream can cause pulse-width distortion, creating jitter and possible increases in error rates. Therefore, a DC restoration circuit is needed to compensate for the attenuation of DC component. The Transceiver implemented is a patent-pending DC restoration circuit, unlike the traditional implementation; it does not need the feedback information from the slicer and clock recovery. This not only simplifies the system/circuit design but also eliminates any random/systematic offset on the receive path. In 10BASE-T mode, the baseline wander correction circuit is not required and is bypassed. |
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