AC207-DS02-R datasheet(33/60 Pages) BOARDCOM

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Preliminary Data Sheet

AC207

07/08/02

B roa dcom

Document

AC207-DS04-405-R

PHY Registers

Page 23

PHY STATUS REGISTER

Table 20: PHY Status Register 1

Bit

Name

Definition

Mode

Default

1.15

100BASE-T4

Tied to zero indicates no 100BASE-T4 capability.

1.14

100BASE-TX full-

duplex

Tied to zero indicates no 100BASE-TX full-duplex support.

1.13

100BASE-TX half-

duplex

1 = 100BASE-TX with half-duplex.

0 = No TX half-duplex ability.

1.12

10BASE-T full-duplex

Tied to zero indicates no 10BASE-T full-duplex support.

1.11

10BASE-T half-duplex 1 = 10BASE-T with half-duplex.

0 = No 10BASE-T half-duplex ability.

1.10:6

Reserved

00001

1.5

Auto-negotiate

complete

1 = Auto-negotiate process completed, indicates Reg. 4, 5, 6 are

valid.

0 = Auto-negotiate process not completed.

N/A

1.4

Remote fault

1 = Remote fault condition detected.

0 = No remote fault.

After this bit is set, it will remain set until it is clear by reading regis-

ter 1 via MDC/MDIO interface.

SC/LH

N/A

1.3

Auto-negotiate ability

1 = Able to perform auto-negotiation function, its value is deter-

mined by ANEGA pin.

0 = Unable to perform auto-negotiation function.

1.2

Link status

1 = Link is established, however, if AC207 link fails, this bit will be-

come cleared and remain cleared until register is read via MDC/

MDIO interface.

0 = Link is down, or have been dropped.

SC/LL

1.1

Jabber detect

1 = Jabber condition detect.

0 = No Jabber condition detected.

SC/LH

1.0

Extended capability

1 = Extended register capable. This bit is tied permanently to one. RO

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