MP2624GL datasheet(20/45 Pages) MPS

20 / 45 page

MP2624 – 4.5A SW CHARGER W/ I2C CONTROL, NVDC POWER PATH, USB OTG

MP2624 Rev.1.05

www.MonolithicPower.com

4/9/2018

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

Input Voltage Based and Input Current Based

Power Management

To meet the maximum current limit for the USB

specification and avoid overloading the adapter,

the MP2624 features both input current and input

voltage power management by continuously

monitoring the input current and input voltage.

The total input current limit is programmable to

prevent the input source from being overloaded.

When the input current hits the limit, the charge

current tapers off to keep the input current from

increasing further.

If the pre-set input current limit is higher than the

rating of the adapter, the back-up input voltage

based power management works to prevent the

input source from being overloaded. When the

input voltage falls below the input voltage

regulation threshold, due to the heavy load, the

charge current is reduced to keep the input

voltage from dropping further.

During CV mode, while battery voltage has been

charged to the value only 100mV lower than the

battery full threshold, if the power path

management happens and charge current drops

be lower than IBF, the charge full will be fault

detected.

The operation of the power path management is

applied in the following two cases:

As mentioned in the “NVDC Power Structure”

section,

a) When VBATT < VSYS_MIN + 60mV, the system

voltage is regulated at Max (VSYS_MIN, VBATT) +

∆V. If the input current or voltage regulation

threshold is reached, the system voltage loop

will lose the control of the DC/DC converter,

which will cause system voltage drops. Once

the system voltage drops by 2%VSYS_MIN, the

charge current will be decreased to keep the

system voltage from dropping further.

b) When VBATT > VSYS_MIN + 60mV (since the

battery is connected to the system directly

due to the free transition between each

control loop), the charge current will decrease

automatically when the input current limit or

the voltage regulation threshold is reached.

Battery Supplement Mode

During battery supplement mode, the charge

current is reduced to keep the input current or

input voltage from dropping when DPM occurs. If

the input source is still overloaded, even when

the charge current has decreased to zero, the

system voltage starts to fall off. Once the system

voltage falls below the battery voltage, the

MP2624 enters battery supplement mode. The

battery will power both the system and the

DC/DC converter simultaneously.

An ideal diode mode is designed in the MP2624

to optimize the control transition between the

battery FET and DC/DC converter. The battery

FET will enter ideal diode mode under the

following conditions:

a) Charging start-up when VBATT > VSYS_MIN + ∆V.

b) When VBATT < VSYS_MIN +∆V, if the system

voltage drops below the battery voltage, the

battery FET will enter ideal diode mode.

During ideal diode mode, the battery FET

operates as an ideal diode. When the system

voltage is 40mV below the battery voltage, the

battery FET turns on and regulates the gate drive

of the battery FET; the VDS of the battery FET

remains around 20mV. As the discharge current

increases, the battery FET obtains a stronger

gate drive and a smaller RDS until the battery FET

is fully on.

NTC

(Negative

Temperature

Coefficient)

Thermistor

“Thermistor” is the generic name given to a

thermally sensitive resistor. Generally, a negative

temperature coefficient thermistor is called a

thermistor. Depending on the manufacturing

method and the structure, there are many

thermistor shapes and characteristics for various

applications. The thermistor resistance values,

unless otherwise specified, are classified at a

standard temperature of 25ºC. The resistance of

a temperature is solely a function of its absolute

temperature.

Refer

the

thermistor

datasheet.

The

mathematical expression, which relates to the

resistance and the absolute temperature of a

thermistor, is shown in Equation (1):

T1 T2

RR e

 









(1)

Where R1 is the resistance at the absolute

temperature T1, R2 is the resistance at the

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