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MP2624GL 数据表(PDF) 33 Page - Monolithic Power Systems |
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MP2624GL 数据表(HTML) 33 Page - Monolithic Power Systems |
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33 / 45 page ![]() MP2624 – 4.5A SW CHARGER W/ I2C CONTROL, NVDC POWER PATH, USB OTG MP2624 Rev.1.05 www.MonolithicPower.com 33 4/9/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. Charge Current Control Register/ Address: 02H (Default: 0010 0001) Bit Symbol Description Read/ Write Default Bit 7 ICHG [5] 2048mA Read/ Write Offset: 512mA Range: 512mA – 4544mA Default: 1024mA (001000) Bit 6 ICHG [4] 1024mA Bit 5 ICHG [3] 512mA Bit 4 ICHG [2] 256mA Bit 3 ICHG [1] 128mA Bit 2 ICHG [0] 64mA USB OTG Current Limit Bit 1 IOLIM[1] 00 – 500mA 01 – 1.3A Read/ Write 1.3A (01) Bit 0 IOLIM[0] Pre-Charge/ Termination Current/ Address: 03H (Default: 0011 0011) Bit Symbol Description Read/ Write Default Pre-Charge Current Bit 7 IPRE [3] 512mA Read/ Write Offset: 64mA Range: 64mA – 1024mA Default: 256mA (0011) Bit 6 IPRE [2] 256mA Bit 5 IPRE [1] 128mA Bit 4 IPRE [0] 64mA Termination Current Bit 3 IBF [3] 512mA Read/ Write Offset: 64mA Range: 64mA – 1024mA Default: 256mA (0011) Bit 2 IBF [2] 256mA Bit 1 IBF [1] 128mA Bit 0 IBF [0] 64mA |
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