| 数据搜索系统,热门电子元器件搜索 |
|
REF2025 数据表(PDF) 13 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
REF2025 数据表(HTML) 13 Page - Texas Instruments |
|
13 / 33 page ![]() 0 10 20 30 40 50 -0.0125 -0.01 -0.0075 -0.005 -0.0025 0 0.0025 Solder Heat Shift Histogram - V REF (%) C041 0 10 20 30 40 50 60 -0.0125 -0.01 -0.0075 -0.005 -0.0025 0 0.0025 Solder Heat Shift Histogram - V BIAS (%) C040 0 50 100 150 200 250 300 0 50 100 150 200 250 300 350 400 Time (seconds) C01 13 REF2025, REF2030, REF2033, REF2041 www.ti.com SBOS600C – MAY 2014 – REVISED JANUARY 2017 Product Folder Links: REF2025 REF2030 REF2033 REF2041 Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated 8 Parameter Measurement Information 8.1 Solder Heat Shift The materials used in the manufacture of the REF20xx have differing coefficients of thermal expansion, resulting in stress on the device die when the part is heated. Mechanical and thermal stress on the device die can cause the output voltages to shift, degrading the initial accuracy specifications of the product. Reflow soldering is a common cause of this error. In order to illustrate this effect, a total of 92 devices were soldered on four printed circuit boards [23 devices on each printed circuit board (PCB)] using lead-free solder paste and the paste manufacturer suggested reflow profile. The reflow profile is as shown in Figure 40. The printed circuit board is comprised of FR4 material. The board thickness is 1.57 mm and the area is 171.54 mm × 165.1 mm. The reference and bias output voltages are measured before and after the reflow process; the typical shift is displayed in Figure 41 and Figure 42. Although all tested units exhibit very low shifts (< 0.01%), higher shifts are also possible depending on the size, thickness, and material of the printed circuit board. An important note is that the histograms display the typical shift for exposure to a single reflow profile. Exposure to multiple reflows, as is common on PCBs with surface-mount components on both sides, causes additional shifts in the output bias voltage. If the PCB is exposed to multiple reflows, the device should be soldered in the second pass to minimize its exposure to thermal stress. Figure 40. Reflow Profile Figure 41. Solder Heat Shift Distribution, VREF (%) Figure 42. Solder Heat Shift Distribution, VBIAS (%) |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |