ADL5519

Data Sheet

Rev. B | Page 8 of 39

Parameter

Conditions

Min

Typ

Max

Unit

DIFFERENCE LEVEL ADJUST

VLVL (Pin 6)

Input Voltage

OUTP, OUTN = FBKA, FBKB

V

Input Resistance

OUTP, OUTN = FBKA, FBKB

100

kΩ

TEMPERATURE COMPENSATION

ADJA, ADJB

Input Resistance

ADJA, ADJB = 0.9 V, sourcing 50 µA

13

kΩ

Disable Threshold Voltage

ADJA, ADJB = open

V

VOLTAGE REFERENCE

VREF (Pin 5)

Output Voltage

1.15

V

Temperature Sensitivity

+26

µV/°C

−26

µV/°C

Current Limit Source/Sink

3/3

mA

TEMPERATURE REFERENCE

TEMP (Pin 19)

Output Voltage

1.36

V

Temperature Sensitivity

4.5

mV/°C

Current Limit Source/Sink

4/50

mA/µA

POWER-DOWN INTERFACE

PWDN (Pin 28)

Logic Level to Enable

Logic low enables

0

V

Logic Level to Disable

Logic high disables

V

Input Current

Logic high PWDN = 5 V

2

µA

Logic low PWDN = 0 V

20

µA

Enable Time

PWDN low to OUTA, OUTB at 100% final value,

CLPA, CLPB = open, RF in = −10 dBm

0.4

µs

Disable Time

PWDN high to OUTA, OUTB at 10% final value,

CLPA, CLPB = open, RF in = 0 dBm

0.25

µs

POWER INTERFACE

VPSA, VPSB, VPSR

Supply Voltage

3.3

5.5

V

Quiescent Current

60

mA

vs. Temperature

147

µA/°C

Disable Current

<1

mA

1

Slope and intercept are determined by calculating the best-fit line between the power levels of −40 dBm and −10 dBm at the specified input frequency.