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AD8337BCPZ-R2 数据表(PDF) 24 Page - Analog Devices |
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AD8337BCPZ-R2 数据表(HTML) 24 Page - Analog Devices |
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24 / 28 page  AD8337 Data Sheet Rev. D | Page 24 of 28 IN 1 8 7 6 5 4 3 2 VOUT VCOM INPP VPOS GAIN VNEG PRAO INPN U1 AD8337 TP1 VOUT GND1 GND2 GND GND3 GND4 R2 49.9Ω RVO1 453Ω RFB2 100Ω RFB1 100Ω R4 0Ω RPO2 453Ω PRAO R1 49.9Ω GAIN RVO3 0Ω L1 120nH L2 120nH J1 DO NOT INSTALL PARTS IN GRAY C4 0.1µF + CG 1nF R5 100Ω C3 0.1µF C1 10µF C2 10µF +VS –VS + Figure 80. Schematic—AD8337-EVALZ Noninverting Configuration IN 1 8 7 6 5 4 3 2 VOUT VCOM INPP VPOS GAIN VNEG PRAO INPN TP1 VOUT R2 49.9Ω RVO1 453Ω RFB2 100Ω RFB1 100Ω R4 0Ω RPO2 453Ω PRAO R1 49.9Ω GAIN RVO3 0Ω L1 120nH L2 120nH J1 DO NOT INSTALL PARTS IN GRAY C4 0.1µF + CG 1nF R5 100Ω 100Ω C3 0.1µF C1 10µF C2 10µF +VS –VS + U1 AD8337 GND1 GND2 GND GND3 GND4 Figure 81. Schematic—AD8337-EVALZ-INV Inverting Configuration CIRCUIT OPTIONS Part numbers for fully assembled boards are listed in Table 4. Table 4. AD8337 Evaluation Board Variations Part Number Configuration AD8337-EVALZ Dual-supply noninverting AD8337-EVALZ-INV Dual-supply inverting AD8337-EVALZ-SS Single-supply noninverting Figure 80, Figure 81, and Figure 82 are schematics for the various circuit configurations. Within limits, the AD8337 preamplifier gain is controlled by Resistor RFB1 and Resistor RFB2. For simple guidelines applying to the current feedback preamplifier, see the Theory of Operation section. OUTPUT PROTECTION The AD8337 VGA output stage is specified for driving loads of 500 Ω or greater. To protect the stage from an accidental overload, a 453 Ω resistor is provided, which when connected to 50 Ω test equipment inputs, enables safe operation. In certain high load impedance situations, the value of this resistor can be reduced. However, if load capacitance values greater than approximately 20 pF are anticipated, such as a BNC cable, the minimum series resistor value is not to be less than 20 Ω. An alternate test pin is also provided for direct access to the output of the AD8337 VGA. The pin is typically used for a probe, and a 0 Ω resistor is provided between the test loop and the output pin. If the test loop is connected to loads ≤500 Ω, then the 0 Ω resistor is to be changed to an appropriate value. VOUT INPP 3 2 1 6 4 7 8 INPN PRAO 5 ADR391AUJZ-R2 GAIN VCOM +VS 1 2 5 4 3 AD8541AR 2 3 4 6 7 VNEG VPOS U1 AD8337 L1 120nH FB GND1 VOUT GAIN U2 GND2 GND3 GND4 IN GND VIN VOUT SHDN C4 0.1µF C9 0.1µF C10 0.1µF C1 10µF 10V + C3 0.1µF RVO1 453Ω CG 1nF RFB1 100Ω RFB2 100Ω C5 0.1µF C2 1µF 16V C6 0.1µF R6 100Ω C7 0.1µF R1 49.9Ω R4 10kΩ C8 0.22µF U3 + Figure 82. Evaluation Board Schematic—Single-Supply Version |
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