Data Sheet

AD8338

Rev. B | Page 13 of 19

NORMAL OPERATING CONDITIONS

Normal operating conditions for the AD8338 are defined as

follows:

•

The input pins, INPR and INMR, are voltage driven (the

source impedance is assumed to be zero).

•

The output pins, OUTP and OUTM, are open circuited

(the load impedance is assumed to be infinite).

•

Pin COMM is grounded.

•

Pin MODE is either tied to a logic high or left uncon-

nected, to set the noninverted gain slope gain mode.

INPR, INMR, INPD, and INMD Pins

The input signal to the AD8338 is accepted at the INPR/INMR

and the INPD/INMD differential input ports. These pins are

internally biased to approximately 1.5 V, the voltage at the

reference pin, VREF. The INPR and INMR pins are voltage

input pins (see Figure 41) where the differential input voltage

current for the VGA core. While the voltage inputs can be

driven in either a single-sided or a differential manner,

operation using a differential drive is preferable and is assumed

in all specifications, unless otherwise stated. The pin-to-pin

input resistance between the voltage inputs is specified as

1000 Ω ± 20%. In most cases, the voltage input pins are ac-

coupled via two capacitors chosen to provide adequate low

frequency transmission. This results in the minimum input

noise that increases when a common-mode voltage other than

1.5 V is forced onto these input pins. The short-circuit (INPR

shorted to INMR) input-referred noise at maximum gain is

approximately 4.5 nV/√Hz.

INPR

INPD

INMD

INMR

500Ω

500Ω

0dB TO 80dB

OUTP

OUTM

1.5V

Figure 41. Input Voltage Applied to the INPR and INMR Pins

The INPD and INMD pins are current input pins (see Figure 42)

where the differential input current is directly applied to the VGA

core input. This input current can either be generated with an

external current source like an unbiased photodiode, or with a

voltage source and external coupling resistors (see Figure 43).

The latter method allows the gain range of the AD8338 to be

shifted as explained in the Explanation of the Gain Function

section. When using the INPD and INMD inputs, the INPR

and INMR pins must be shorted to one another to prevent

stability issues.

INPR

INPD

INMD

INMR

500Ω

500Ω

0dB TO 80dB

OUTP

OUTM

1.5V

Figure 42. Input Current Applied to the INPD and INMD Pins

INPR

INPD

INMD

INMR

500Ω

500Ω

20dB TO 80dB

OUTP

OUTM

1.5V

50Ω

50Ω

Figure 43. Using External Resistors at the INPD and INMD Pins

FBKP, FBKM, OUTP, and OUTM Pins

Output voltage pins, OUTP and OUTM, have a default common-

mode voltage of 1.5 V, the voltage at the VREF reference pin.

This output common-mode voltage can be adjusted by injecting

common-mode currents into Pin FBKP and Pin FBKM, the

summing nodes of the output amplifiers, which are also biased

at 1.5 V. The output amplifiers of the AD8338 possess rail-to-

rail output stages, which allow the output common mode of the

VGA to be shifted from ground to the positive supply, though

the use of such extreme values leaves only a small range for the

differential output signal swing.

and OUTM, FBKM) reduces the bandwidth of the output

amplifiers of the AD8338 and the signal path of the VGA. These

capacitors and the feedback resistors of the output amplifiers

form a low-pass filter with a cut-off frequency of approximately

FBK

FBK

C

C

R

f

×

×

π

=

2

1

(1)

Reducing the bandwidth of the AD8338 minimizes output noise

and simplifies the design of the antialiasing filter when using the

VGA to drive an ADC.