Data Sheet

AD8338

Rev. B | Page 15 of 19

AGC Circuit, VAGC Pin

The AD8338 includes a current output rms detector that can be

used to configure the AD8338 as an AGC amplifier (see Figure 46).

In this configuration, the AGC circuit compares the rms output

amplitude of the VGA with the desired rms output amplitude (the

voltage at Pin VAGC with respect to the voltage at Pin VREF),

and drives Pin GAIN to minimize their difference. Therefore,

in steady state conditions, the circuit forces the rms output

amplitude of the AD8338 to be the voltage at Pin VAGC with

respect to the voltage at Pin VREF. Because the AGC circuit

uses negative feedback, the gain slope of the AD8338 needs to

be set by connecting Pin MODE to ground.

The AGC attack time, or the time it takes for the AGC to

This time is approximately

(5)

With a 0.1 µF capacitor, the AGC response time is approximately

1.75 ms.

When using the AGC loop, the output voltage is set against an

rms target, defined by the applied voltage at the VAGC pin. The

output reflects the rms value of the absolute value difference

between VAGC and VREF. The designer must be aware that for

values of (VAGC − VREF) larger than 0.6 V, output limiting

begins to greatly distort the signal.

(6)

(7)

0

0.2

0.4

0.6

0.8

1.0

1.2

0

0.5

1.0

1.5

2.0

2.5

3.0

VAGC VOLTAGE (V)

Figure 45. Output RMS Voltage vs. VAGC

Not all applications require the AGC circuit. Therefore, the

AGC circuit can be disabled by connecting Pin DETO to

ground, and connecting Pin VAGC to Pin VREF.

Internal Reference, Pin VREF

The AD8338 includes an internal 1.5 V voltage reference that is

used to set the quiescent bias voltages of many key nodes in the

VGA. These nodes include inputs pins (INPR, INMR, INPD, and

INMD), output pins (OUTP and OUTM), and feedback pins

(FBKP and FBKM). The output voltage of the internal reference,

Pin VREF, can be bypassed with a 0.1 µF capacitor to Pin COMM;

however, do not force VREF externally.

INPR

INPD

INMD

INMR

FBKM

OUTP

OUTM

FBKP

VREF

VGA CORE

0dB TO 80dB

OFFSET NULL

OUTPUT

STAGE

0dB

OFSN

VREF

VBAT

AUTOMATIC

GAIN

CONTROL

GAIN INTERFACE

AD8338

AGC SETPOINT

0.01µF

Figure 46. AD8338 Configured as an AGC Amplifier