Rev. 3.5

RI-RFM-006A

Page 8 of 19

terminal in bit strings (“1” or “0”). To delimit these continuous bit strings, clock signals are output from

the “RXCK” terminal in synchronization with each bit data.

In normal operating conditions (when data communication can be properly performed between the RI-

RFM-006A and a TIRIS transponder), each bit data group sent from the remote transponder is composed

of sixteen consecutive signal waves belonging to the same frequency band (consisting of two wave

groups, 134.2-kHz high and 123.2-kHz low in terms of normal values). Therefore, clock signals at a

frequency resulting from a simple division of the “A3OP” terminal signal frequency by 16, are output

from the “RXCK” terminal. Then, each “RXCK” clock signal is controlled for output so that its first

transition falls after four consecutive “A3OP” signal waves from the “RXDT-“ signal change point. This

enables an external controller to obtain the relevant bit data without fail provided that each “RXDT-“

signal is fetched well timed with the first transition of each “RXCK” signal. (See the diagram below.)

Sometimes at starting or during data receiving, some bit data group (composed of sixteen consecutive

signal waves belonging to the same frequency band) may be affected by interference noise, this causing

the number of its waves to vary and the consequent synchronous discrepancy between “RXDT-“ and

“RXCK” signals. To correct this discrepancy, the sixteenth dividing counter of frequency incorporated in

this RF-module IC for “RXCK” clock signal generation are always reset at the moment at which any

internal demodulated bit data changes from “0” to “1” so that “RXCK” terminal signals are forcibly

output at L-level with the timing shown below. This correction is made automatically regardless of

whether or not receiving signals are properly input. (The frequency dividing counter is not reset at bit

data change from “1” to “0”.)

Note: For details about timing among these signals, refer to the section describing “Input-

Output Specifications”.

A3OP terminal signal

RXCK terminal output

DATA VALID

RXDT- terminal output

15

16

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

1

2

3

One bit data group (16 waves)

4 waves

4 waves

8 waves

A3OP terminal signal

RXCK terminal output

RXDT- terminal output

14

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

1

DATA="0"

16

DATA="1"

15

13

(each duration is equivalent to four A3OP terminal

Timing is controlled so that these durations are uniform