TPS16632RGET datasheet(13/30 Pages) TI1

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TPS16632

PŸ

OUT

dVdT

ILIM

P_IN

RILIM

FLT

GND

SHDN

UVLO

OVP

MODE

IMON

RIMON

PGOOD

Protected supply

To Load

4.5 V - 60 V

Load Monitor

ON/OFF Control

COUT

CdVdT

TPS1663

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SLVSET9A – SEPTEMBER 2018 – REVISED OCTOBER 2018

Product Folder Links: TPS1663

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Feature Description (continued)

8.3.4 PGOOD

The devices feature an open drain Power good (PGOOD) indicator output. PGOOD can be used for enable and

disable of the downstream loads like DC-DC converters. PGOOD goes high when the internal FET’s gate is

enhanced. It goes low when the internal FET turns OFF during a fault event or when SHDN is pulled low. There

is a deglitch of 11.5 msec (typical) at the rising edge and falling edge. PGOOD is a rated for 60 V and can be

pulled to IN or OUT through a resistor.

8.3.5 Output Power Limiting, PLIM (TPS16632 Only)

With a fixed over current limit threshold the power limit profile increases linearly with supply input. Electrical

Industrial process control equipment such as PLC CPU needs to comply with standards like IEC61010-1 for fire

safety which require limited energy and power circuits. Limiting the output power becomes a challenge in such

high power applications where the operating supply voltage range is wide. The TPS16632 integrate adjustable

output power limiting functionality that simplifies the system design requiring compliance in accordance to this

standard.

Connect a resistor from PLIM to GND as shown in Figure 5 to program the output power limiting value. If PLIM is

connected to GND then PLIM feature is not activated and the device works normally with current limiting set by

the external RLIM resistor.

During an over power load event the TPS16632 limits the output power at the programmed value set by PLIM

resistor. This indirectly results in the device operation in current limiting mode with steady state output voltage

and current set by the load characteristics and PLIM = VOUT × IOUT. The maximum duration for the device to be in

power limiting mode is tCL(dly). Post that the device operates either in auto-retry or latch off mode based on

MODE pin configuration.

P(PLIM) = 1 x R(PLIM)

(4)

Here P(PLIM) is output power limit in watts, R(PLIM) is the power limit setting resistor in kΩ. Figure 6 illustrate output

power limiting performance of TPS16632.

Figure 5. TPS16632 Typical Application Schematic

TPS16632RGET 数据表(PDF) 13 Page - Texas Instruments

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