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74FCT16952CTPVG 数据表(PDF) 5 Page - Integrated Device Technology

部件名 74FCT16952CTPVG
功能描述  FAST CMOS 16-BIT REGISTERED TRANSCEIVER
PDF  7 Pages
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制造商  IDT [Integrated Device Technology]
网页  http://www.idt.com
标志 IDT - Integrated Device Technology

74FCT16952CTPVG 数据表(HTML) 5 Page - Integrated Device Technology

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IDT74FCT16952AT/CT/ET
FASTCMOS16-BITREGISTEREDTRANSCEIVER
INDUSTRIALTEMPERATURERANGE
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested.
3. This limit is guaranteed but not tested.
4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
SWI TCH I N G CH ARACT ERI ST I CS OV ER OPERAT I N G RAN GE - I N DU ST RI AL
FCT16952AT
FCT16952CT
FCT16952ET
Symbol
Parameter
Condition(1)
Min.(2)
Max.
Min.(2) Max. Min.(2)
Max.
Unit
tPLH
Propagation Delay
CL = 50pF
2
10
2
6.3
1.5
3.7
ns
tPHL
xCLKAB, xCLKBA to xBx, xAx
RL = 500
Ω
tPZH
Output EnableTime
1.5
10.5
1.5
7
1.5
4.4
ns
tPZL
xOEBA, xOEAB to xAx, xBx
tPHZ
Output Disable Time
1.5
10
1.5
6.5
1.5
3.6
ns
tPLZ
xOEBA, xOEAB to xAx, xBx
tSU
Set-up Time, HIGH or LOW
2.5
—
2.5
—
1.5
—
ns
xAx, xBx to xCLKAB, xCLKBA
tH
Hold Time, HIGH or LOW
2
—
1.5
—
0
—
ns
xAx, xBx to xCLKAB, xCLKBA
tSU
Set-up Time, HIGH or LOW
3
—
3
—
2
—
ns
xCEBA, xCEAB, to xCLKAB, xCLKBA
tH
Hold Time, HIGH or LOW
2
—
2
—
0
—
ns
xCEBA, xCEAB, to xCLKAB, xCLKBA
tW
Pulse Width HIGH or LOW, xCLKAB or xCLKBA (3)
3—
3
—
3—
ns
tSK(o)
Output Skew(4)
—
0.5
—
0.5
—
0.5
ns



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