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MAS6116 数据表(PDF) 13 Page - Micro Analog systems |
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MAS6116 数据表(HTML) 13 Page - Micro Analog systems |
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13 / 20 page ![]() 13 (20) DA6116.010 5 October, 2017 DIGITAL CHARACTERISTICS Digital Inputs/Outputs (AVCC=+5.0 V, AGND=0 V, TA=+25oC unless otherwise noted) Parameter Symbol Conditions Min Typ Max Unit Input low voltage VIL All digital inputs, DC 0.3* DVCC V Input high voltage VIH All digital inputs, DC 0.7* DVCC V Output low voltage VOL All digital outputs, IL=2mA 0.3* DVCC V Output high voltage VOH All digital outputs, IH=-2mA 0.7* DVCC V Serial Interface Timing (AVCC=+5.0 V, AGND=0 V, TA=+25oC unless otherwise noted) Parameter Symbol Conditions Min Typ Max Unit Frequency of CCLK FCCLK 10 MHz Period of CCLK high TWHC Measured from VIH to VIH 50 ns Period of CCLK low TWLC Measured from VIL to VIL 50 ns Rise time of CCLK TRC Measured from VIL to VIH 100 ns Fall time of CCLK TFC Measured from VIH to VIL 100 ns Hold time, CCLK high to XCS low THCSH 20 ns Setup time, XCS low to CCLK high TSSLCH 100 ns Setup time, valid CI to CCLK high TSDCH 100 ns Hold time, CCLK high to invalid CI THCHD 100 ns Delay time, CCLK low to valid CI TDCLD Load=100pF 50 ns Delay time, XCS high or 8th CCLK low to invalid CI TDSZ Load=3.3k 50 150 ns Hold time, 16th CCLK high to XCS high THLCHS 200 ns Setup time, XCS high to CCLK high TSSHCH 200 ns |
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