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VL53L1 数据表(PDF) 21 Page - STMicroelectronics |
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VL53L1 数据表(HTML) 21 Page - STMicroelectronics |
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21 / 35 page ![]() DocID031281 Rev 3 21/35 VL53L1X Control interface 35 Figure 16. VL53L1X data format (sequential read) 4.1 I2C interface - timing characteristics Timing characteristics are shown in Table 10. Please refer to Figure 17 for an explanation of the parameters used. S As ADDRESS[7:0] Am DATA[7:0] P 0x53 (read) Am DATA[7:0] Am DATA[7:0] Am DATA[7:0] Am DATA[7:0] S As ADDRESS[7:0] INDEX[7:0] As P 0x52 (write) INDEX[15:8] As Table 10. I2C interface - timing characteristics for Fast mode (400 kHz) Symbol Parameter Min. Typ. Max. Unit FI2C Operating frequency 0 - 400 kHz tLOW Clock pulse width low 1.3 - - μs tHIGH Clock pulse width high 0.6 - - tSP Pulse width of spikes which are suppressed by the input filter - - 50 ns tBUF Bus free time between transmissions 1.3 - - µs tHD.STA Start hold time 0.26 - - μs tSU.STA Start set-up time 0.26 - - tHD.DAT Data in hold time 0 - 0.9 tSU.DAT Data in set-up time 50 - - ns tR SCL/SDA rise time - - 300 tF SCL/SDA fall time - - 300 tSU.STO Stop set-up time 0.6 - - μs Ci/o Input/output capacitance (SDA) - - 10 pF Cin Input capacitance (SCL) - - 4 CL Load capacitance - 125 400 |
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