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NUC505-YO2N 数据表(PDF) 73 Page - Nuvoton Technology Corporation |
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NUC505-YO2N 数据表(HTML) 73 Page - Nuvoton Technology Corporation |
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73 / 130 page  NUC505 July. 26, 2018 Page 73 of 130 Rev.1.08 6.2.3 System Power-on Setting The power-on setting is used to configure the chip to enter the specified state when the chip is powered up or reset. Since each pin of power-on setting has an internal pulled-up resistor during reset period, if the application needs to set the configuration to “0”, the proper pull-down must be added for the corresponding configuration pins. PB.4 PB.3 PA.10 PA.9 Description Register Mapping 1 1 1 1 Boot from Internal MCP SPI Flash SYS_BOOTSET[3:0] 1 1 1 0 Boot from USB SYS_BOOTSET[3:0] 1 1 0 1 Boot from External SPI Flash SYS_BOOTSET[3:0] 1 0 1 1 Boot from ICP Mode SYS_BOOTSET[3:0] 0 1 1 1 SWD/ICE Mode with Internal SPI Flash SYS_BOOTSET[3:0] 0 1 1 0 SWD/ICE Mode with External SPI Flash SYS_BOOTSET[3:0] Table 6.2-1 System Power-on Setting Guide 6.2.4 System Power Distribution In this chip, power distribution is divided into five segments: Audio CODEC power from AVDDCODEC, AVDDHP, and AVSSHP provides the power for audio CODEC operation. Analog-to-Digital converter (ADC) power from AVDDADC and AVSSADC provides the power for ADC operation. Digital power from VDD and VSS supplies the power to the internal regulator which provides a fixed 1.2 V power for digital operation and I/O pins. USB transceiver power from AVDDUSB offers the power for operating the USB transceiver. RTC power from VBAT provides the power for RTC and 80 bytes backup registers. The outputs of internal voltage regulators, LDO and VDD, require an external capacitor which should be located close to the corresponding pin. Analog power (AVDDCODEC and AVDDADC) should be the same voltage level of the digital power (VDD). The following figure shows the power distribution of the NuMicro ® NUC505. |
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