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NUC505-YO2Y 数据表(PDF) 87 Page - Nuvoton Technology Corporation |
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NUC505-YO2Y 数据表(HTML) 87 Page - Nuvoton Technology Corporation |
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87 / 130 page  NUC505 July. 26, 2018 Page 87 of 130 Rev.1.08 12 MHz 20pF 1 M Ω 32.768 kHz 33pF 10 M Ω Table 6.3-1 Recommended Load Capacitance Values and Resistance Values. C1 C2 R crystal CHIP BOARD External Crystal CLOCK_OUT XT_IN / X32_IN XT_OUT / X32_OUT Figure 6.3-3 Crystal Oscillator Circuit 6.3.4 Power-down Mode Clock When entering Power-down mode, system clocks, some clock sources and some peripheral clocks are disabled. Some clock sources and peripherals clock are still active in Power-down mode. The clocks which still keep active are listed below: Clock Generator 32.768 kHz internal low speed RC oscillator (LIRC) clock 32.768 kHz external low speed crystal oscillator (LXT) clock In Power-down mode, If the woke-up even occurred, the disabled clocks will be regenerated after PDWKPSC (CLK_PWRCTL[23:8]) x 256 HXT cycle. |
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