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NUC505-YO2T 数据表(PDF) 74 Page - Nuvoton Technology Corporation |
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NUC505-YO2T 数据表(HTML) 74 Page - Nuvoton Technology Corporation |
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74 / 130 page  NUC505 July. 26, 2018 Page 74 of 130 Rev.1.08 USB Transceiver AVDDHP AVSSHP AVDDUSB USB_D+ USB_D- SRAM PLL IO Cell 3.3V à 1.2V LDO POR33 POR12 Low Voltage Detector Low Voltage Reset 24-bit Audio CODEC 12 MHz crystal oscillator Digital Logic 12-bit ADC Power On Control XT1_OUT XT1_IN GPIO 1.2V 3.3V 3.3V LDO_CAP 4.7uF NUC505 power distribution AVDDCODEC 3.3V 3.3V 32.768 kHz crystal oscillator RTC 32 bytes backup register 3.3V Figure 6.2-1 NuMicro ® NUC505 Power Distribution Diagram 6.2.5 System Memory Mapping The NUC505 provides a 4G-byte address space for programmers. The memory locations assigned to each on-chip modules are shown in Table 6.2-2. The detailed registers and memory addressing or programming will be described in the following sections for individual on-chip modules. The NUC505 only supports little-endian data format. Address Space Token Modules Memory Space 0x1FFF_0000 – 0x1FFF_7FFF IBR_BA Internal Boot ROM (IBR) Memory Space |
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