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MPC859TZP133 数据表(PDF) 70 Page - Freescale Semiconductor, Inc

部件名 MPC859TZP133
功能描述  Hardware Specifications
PDF  92 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

MPC859TZP133 数据表(HTML) 70 Page - Freescale Semiconductor, Inc

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MPC866/859 Hardware Specifications
MOTOROLA
UTOPIA AC Electrical Specifications
UTOPIA AC Electrical Specifications
13
UTOPIA AC Electrical Specifications
Table 30 through Table 32 show the AC electrical specifications for the UTOPIA interface.
Table 30. UTOPIA Master (Muxed Mode) Electrical Specifications
Num
Signal Characteristic
Direction
Min
Max
Unit
U1
UtpClk rise/fall time (Internal clock option)
Output
4
ns
Duty cycle
50
50
%
Frequency
33
MHz
U2
UTPB, SOC, RxEnb, TxEnb, RxAddr, and TxAddr-active
delay (and PHREQ and PHSEL active delay in MPHY mode)
Output
2
16
ns
U3
UTPB, SOC, Rxclav and Txclav setup time
Input
4
ns
U4
UTPB, SOC, Rxclav and Txclav hold time
Input
1
ns
Table 31. UTOPIA Master (Split Bus Mode) Electrical Specifications
Num
Signal Characteristic
Direction
Min
Max
Unit
U1
UtpClk rise/fall time (Internal clock option)
Output
4
ns
Duty cycle
50
50
%
Frequency
33
MHz
U2
UTPB, SOC, RxEnb, TxEnb, RxAddr and TxAddr active
delay (PHREQ and PHSEL active delay in MPHY mode)
Output
2
16
ns
U3
UTPB_Aux, SOC_Aux, Rxclav, and Txclav setup time
Input
4
ns
U4
UTPB_Aux, SOC_Aux, Rxclav, and Txclav hold time
Input
1
ns
Table 32. UTOPIA Slave (Split Bus Mode) Electrical Specifications
Num
Signal Characteristic
Direction
Min
Max
Unit
U1
UtpClk rise/fall time (external clock option)
Input
4
ns
Duty cycle
40
60
%
Frequency
33
MHz
U2
UTPB, SOC, Rxclav and Txclav active delay
Output
2
16
ns
U3
UTPB_AUX, SOC_Aux, RxEnb, TxEnb, RxAddr, and TxAddr
setup time
Input
4
ns
U4
UTPB_AUX, SOC_Aux, RxEnb, TxEnb, RxAddr, and TxAddr
hold time
Input
1
ns
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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