TC9204M
Preliminary Data Sheet
Pin Listing (continued)
No.
Pin label
Type
Description
29
Rxd62
Is
GMII receive data - least significant nibble.
MII receive data
30
Vss 2.0
G
Digital ground for core
31
Rxd63
Is
GMII receive data - least significant nibble.
MII receive data
32
Rxd64
Is
GMII receive data - most significant nibble
33
Rxd65
Is
GMII receive data - most significant nibble
34
Rxd66
Is
GMII receive data – most significant nibble
35
Rxd67
Is
GMII receive data – most significant nibble
36
Vdd 3.3
P
Digital +3.3V power supply for I/O
37
Vss 3.3
G
Digital ground for I/O
38
Vdd 2.0
P
Digital +2.0V power supply for core
39
Vss 2.0
G
Digital ground for core
40
Vdd 3.3
P
Digital +3.3V power supply for I/O
41
Gnd
I
42
Vss 3.3
G
Digital ground for I/O
43
Gnd
I
44
Vdd 3.3
P
Digital +3.3V power supply for I/O
45
Vss 3.3
G
Digital ground for I/O
46
NC
NA
Reserved for future use
47
NC
NA
Reserved for future use
48
NC
NA
Reserved for future use
49
NC
NA
Reserved for future use
50
NC
NA
Reserved for future use
51
NC
NA
Reserved for future use
52
NC
NA
Reserved for future use
53
Vdd 3.3
P
Digital +3.3V power supply for I/O
54
Txd07
O
GMII transmit data – bits 7
55
Txd06
O
GMII transmit data – bits 6
56
Txd05
O
GMII transmit data – bits 5
57
Vss 3.3
G
Digital ground for I/O
58
Txd04
O
GMII transmit data – bits 4
59
Txd03
O
GMII/MII transmit data – bits 3
60
Txd02
O
GMII/MII transmit data – bits 2
61
Vdd 3.3
P
Digital +3.3V power supply for I/O
Txd01
GMII/MII transmit data – bit 1
62
Priclass01
I/Opd
Priority class – most significant bit.
Txd00
GMII/MII transmit data – least significant bit
63
Priclass00
I/Opu
Priority class – least significant bit. Sets priority level per port basis.
PriClass[0] – ‘00’ – port 0 has low priority
PriClass[0] – ‘01’ – port 0 has normal priority
PriClass[0] – ‘10’ – port 0 has high priority
PriClass[0] – ‘11’ – port 0 has very high priority
PriClass[0] is latched on reset
Confidential.
7/49
July 29, 2003
Copyright © 2003, IC Plus Corp.
TC9204M-DS-R05
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