C9827HT datasheet(1/25 Pages) CYPRESS

部件名	C9827HT

功能描述	High Performance Pentium 4 Clock Synthesizer

PDF	25 Pages

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制造商	CYPRESS [Cypress Semiconductor]

网页	http://www.cypress.com

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C9827H

High Performance Pentium® 4 Clock Synthesizer

Cypress Semiconductor Corporation

http://www.cypress.com

Document#: 38-07106 Rev. *A

12/26/2002

Page 1 of 25

Approved Product

Product Features

•

Supports Pentium

® 4 Type CPUs

•

3.3 Volt Power Supply

•

10 Copies of PCI Clocks

•

3 Differential CPU Clocks

•

SMBus Support with Read-back Capabilities

•

Spread Spectrum EMI Reduction

•

Dial-a-Frequency™ Features

•

Dial-a-dB™ Features

•

56 Pin SSOP and TSSOP Package

Frequency Table

S2

S1

S0

CPU

(0:2)

3V66

66BUFF(0:2)/

3V66(0:4)

66IN/

3V66-5

PCI_F

PCI

REF

USB/

DOT

1

0

66M

66IN

66MHz clock input

66IN/2

14.318M

48M

1

0

1

100M

66M

66IN

66MHz clock input

66IN/2

14.318M

48M

1

0

200M

66M

66IN

66MHz clock input

66IN/2

14.318M

48M

1

133M

66M

66IN

66MHZ clock input

66IN/2

14.318M

48M

0

66M

33 M

14.318M

48M

0

1

100M

66M

33 M

14.318M

48M

0

1

0

200M

66M

33 M

14.318M

48M

0

1

133M

66M

33 M

14.318M

48M

M

0

Hi-Z

M

0

1

TCLK/2

TCLK/4

TCLK/8

TCLK

TCLK/2

M

1

0

150M

50M

25M

14.318M

48M

M

1

166.6M

55.5M

27.7M

14.318M

48M

Note: TCLK is a test clock over driven on the XTAL_IN input during test mode. M= driven to a level between 1.0 and 1.8 Volts

If the S2 pin is at a M level during power up, a 0 state will be latched into the devices internal state register.

Block Diagram

Pin Configuration

VDD

XIN

XOUT

VSS

PCIF0

PCIF1

PCIF2

VDD

VSS

PCI0

PCI1

PCI2

PCI3

VDD

VSS

PCI4

PCI5

PCI6

VDD

VSS

66B0/3V66_2

66B1/3V66_3

66B2/3V66_4

66IN/3V66_5

PD#

VDDA

VSSA

VTT_PG#

REF

S1

S0

CPU_STP#

CPU0

CPU/0

VDD

CPU1

CPU/1

VSS

VDD

CPU2

CPU/2

MULT0

IREF

VSSIREF

S2

48MUSB

48MDOT

VDD

VSS

3V66_1/VCH

PCI_STP#

3V66_0

VDD

VSS

SCLK

SDATA

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

56

55

54

53

52

51

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

PLL1

PLL2

/2

WD

Logic

Power

Up Logic

XIN

XOUT

CPU_STP#

IREF

VSSIREF

S(0:2)

MULT0

VTT_PG#

PCI_STP#

PD#

SDATA

SCLK

VDDA

66B[0:2]/3V66[2:4]

48M DOT

48M USB

PCI_F(0:2)

PCI(0:6)

3V66_1/VCH

3V66_0

CPU/(0:2)

CPU(0:2)

REF

66IN/3V66-5

I2C

Logic

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