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TMS320DM643 数据表(PDF) 13 Page - Texas Instruments |
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TMS320DM643 数据表(HTML) 13 Page - Texas Instruments |
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13 / 160 page  www.ti.com 2.3 Memory Map Summary TMS320DM643 Video/Imaging Fixed-Point Digital Signal Processor SPRS269A – FEBRUARY 2005 – REVISED APRIL 2005 Table 2-3 shows the memory map address ranges of the DM643 device. Internal memory is always located at address 0 and can be used as both program and data memory. The external memory address ranges in the DM643 device begin at the hex address location 0x8000 0000 for EMIFA. Table 2-3. TMS320DM643 Memory Map Summary BLOCK SIZE MEMORY BLOCK DESCRIPTION HEX ADDRESS RANGE (BYTES) Internal RAM (L2) 256K 0000 0000 – 0003 FFFF Reserved 768K 0004 0000 – 000F FFFF Reserved 23M 0010 0000 – 017F FFFF External Memory Interface A (EMIFA) Registers 256K 0180 0000 – 0183 FFFF L2 Registers 256K 0184 0000 – 0187 FFFF HPI Registers 256K 0188 0000 – 018B FFFF McBSP 0 Registers 256K 018C 0000 – 018F FFFF Reserved 256K 0190 0000 – 0193 FFFF Timer 0 Registers 256K 0194 0000 – 0197 FFFF Timer 1 Registers 256K 0198 0000 – 019B FFFF Interrupt Selector Registers 256K 019C 0000 – 019F FFFF EDMA RAM and EDMA Registers 256K 01A0 0000 – 01A3 FFFF Reserved 512K 01A4 0000 – 01AB FFFF Timer 2 Registers 256K 01AC 0000 – 01AF FFFF GP0 Registers 256K – 4K 01B0 0000 – 01B3 EFFF Device Configuration Registers 4K 01B3 F000 – 01B3 FFFF I2C0 Data and Control Registers 16K 01B4 0000 – 01B4 3FFF Reserved 32K 01B4 4000 – 01B4 BFFF McASP0 Control Registers 16K 01B4 C000 – 01B4 FFFF Reserved 192K 01B5 0000 – 01B7 FFFF Reserved 256K 01B8 0000 – 01BB FFFF Emulation 256K 01BC 0000 – 01BF FFFF Reserved 256K 01C0 0000 – 01C3 FFFF Reserved 16K 01C4 0000 – 01C4 3FFF VP1 Control 16K 01C4 4000 – 01C4 7FFF VP2 Control 16K 01C4 8000 – 01C4 BFFF VIC Control 16K 01C4 C000 – 01C4 FFFF Reserved 192K 01C5 0000 – 01C7 FFFF EMAC Control 4K 01C8 0000 – 01C8 0FFF EMAC Wrapper 8K 01C8 1000 – 01C8 2FFF EWRAP Registers 2K 01C8 3000 – 01C8 37FF MDIO Control Registers 2K 01C8 3800 – 01C8 3FFF Reserved 3.5M 01C8 4000 – 01FF FFFF QDMA Registers 52 0200 0000 – 0200 0033 Reserved 928M – 52 0200 0034 – 2FFF FFFF McBSP 0 Data 64M 3000 0000 – 33FF FFFF Reserved 64M 3400 0000 – 37FF FFFF Reserved 64M 3800 0000 – 3BFF FFFF McASP0 Data 1M 3C00 0000 – 3C0F FFFF Reserved 64M – 1M 3C10 0000 – 3FFF FFFF Device Overview 13 |
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