11-268
RF2958
Rev A0 050209
Pin
Function
Description
1IF IN+
Differential input from IF SAW filter. See application schematic for matching circuit.
2IF IN-
See pin 1.
3
VCC IF
Power supply for IF circuitry. Provide 330pF bypass capacitor close to this pin.
4R BIAS
Bandgap voltage reference for on-chip biasing. Install a 22.1k
Ω,
1% resistor from this pin to ground.
5
VCC RF2
Power supply for TX and RX bias, LO buffers and mixers. Provide 6pF bypass capacitor close to this pin.
6
VCC RF1
See pin 5.
7IF OUT-
Differential output to IF SAW filter. See application schematic for matching circuit.
8
IF OUT+
See pin 7.
9TX VGC
TX analog gain control. Depending on desired operation mode, transmitter gain can be controlled through
this pin or the three-wire digital interface. This pin can also provide a bias voltage to an external PA. See
theory of operation for details.
10
RF OUT
TX PA driver output.
11
VCC RF3
Power supply for LNA and TX output driver. Power should be connected to this pin through an inductor or a
long 50
Ω transmission line RF-shorted with a 6pF capacitor at the other end.
12
RF IN
RX input from antenna.
13
LNA GS
Gain select pin for the internal LNA. High-gain operation is selected when this pin is a logic ‘1’.
14
VCC PLL1
Power supply for the PLL RF LO synthesizer. Provide 0.01
µF and 6pF bypass capacitors close to this pin.
15
PLL REG
Internal PLL regulator output. Bypass with 10nF capacitor. Do not connect to VCC or ground.
16
MODE1
Controls operational state of the device. See Theory of Operation section for details.
17
MODE0
See pin 16.
18
MCLK
Reference oscillator for the PLL synthesizer.
19
SDI
Data signal for the synchronous three-wire digital control interface.
20
SSB
Chip select signal for the synchronous three-wire digital control interface.
21
SCLK
Clock signal for the synchronous three-wire digital control interface.
22
VCC PLL4
Power supply for the PLL IF LO synthesizer. Provide 0.01
µF and 330pF bypass capacitors close to this
pin.
23
DIG REG
Internal digital regulator output. Bypass with 10nF capacitor. Do not connect to VCC or ground.
24
VREF
I/Q DC reference voltage for the baseband processor. This pin should be connected to a high impedance
on the baseband processor.
25
Q BYP
Baseband differential input signal for the TX quadrature channel. For single-ended applications, bypass to
ground with a 0.01
µF capacitor.
26
TX Q
Baseband input signal for the TX quadrature channel.
27
I BYP
Baseband differential input signal for the TX in-phase channel. For single-ended applications, bypass to
ground with a 0.01
µF capacitor.
28
TX I
Baseband input signal for the TX in-phase channel.
29
VCC BB
Power supply for baseband circuitry. Provide 0.01
µF bypass capacitor close to this pin.
30
RX Q
Baseband output signal for the RX quadrature channel.
31
RX I
Baseband output signal for the RX in-phase channel.
32
RX VGC
Analog gain control for the RF IF amplifier.
Pkg
Base
GND
Device ground. Connect directly to PCB ground plane.
ESD
All pins except pin 12 are provided with electrostatic discharge protection to 3kV using the human body
model.
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