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CS61318 数据表(PDF) 7 Page - Cirrus Logic |
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CS61318 数据表(HTML) 7 Page - Cirrus Logic |
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7 / 28 page ![]() CS61318 DS441PP2 7 SERIAL PORT SWITCHING CHARACTERISTICS (TA = -40 ° to 85°C; TV+, RV+ = 5V ±5%; Inputs: Logic 0 = 0 V, Logic 1 = RV+) Notes: 21. Output load capacitance = 50 pF Parameter Symbol Min Typ Max Units SDI to SCLK Setup Time tdc 50 - - ns SCLK to SDI Hold Time tcdh 50 - - ns SCLK Low Time tcl 240 - - ns SCLK High Time tch 240 - - ns SCLK Rise and Fall Time tr, tf - - 50 ns CS to SCLK Setup Time tcc 50 - - ns SCLK to CS Hold Time tcch 50 - - ns CS Inactive Time tcwh 250 - - ns SCLK to SDO Valid (Note 21) tcdv -- 200 ns CS to SDO High Z tcdz -100 - ns t dc t cc LSB LSB MSB CONTROL BYTE DATA BYTE CS SCLK SDI t ch t cwh t cch t cdh t cl t cdh Figure 4. Serial Port Write Timing Diagram HIGH Z CS SCLK SDO CLKE = 1 SDI cdv t cdv t cdz t SDO CLKE = 0 LAST ADDR BIT D0 D1 D6 D7 D0 D1 D6 D7 Figure 5. Serial Port Read Timing Diagram |
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