Symbol

Alt

Parameter

Min

Max

Unit

Clock Rise Time

300

ns

Clock Fall Time

300

ns

(1)

SDA Rise Time

20

300

ns

(1)

SDA Fall Time

20

300

ns

(2)

Clock High to Input Transition

600

ns

Clock Pulse Width High

600

ns

Input Low to Clock Low (START)

600

ns

Clock Low to Input Transition

0

µs

Clock Pulse Width Low

1.3

µs

Input Transition to Clock Transition

100

ns

Clock High to Input High (STOP)

600

ns

Input High to Input Low (Bus Free)

1.3

µs

(3)

Clock Low to Next Data Out Valid

200

1000

ns

Data Out Hold Time

200

ns

Clock Frequency

400

kHz

Write Time

10

ms

Notes: 1. Sampled only, not 100% tested.

2. For a reSTART condition, or following a write cycle.

3. The minimum value delays the falling/rising edge of SDA away from SCL = 1 in order to avoid unwanted START and/or STOP

conditions.

Table 7. AC Characteristics

Memory Addressing. A data byte in the memory

is addressed through 2 bytes of address informa-

tion. The Most Significant Byte is sent first and the

Least significant Byte is sent after. The Least Sig-

nificant Byte addresses a block of 256 bytes, bits

b12,b11,b10,b9,b8 of the Most Significant Byte

select one block among 32 blocks (one block is 256

bytes).

Most Significant Byte

X

X

X

b12

b11

b10

b9

b8

X = Don’t Care.

Least Significant Byte

b7

b6

b5

b4

b3

b2

b1

b0

DEVICE OPERATION (cont’d)

Input Rise and Fall Times

≤ 50ns

Input Pulse Voltages

AC MEASUREMENT CONDITIONS

AI00825

0.8VCC

0.2VCC

0.7VCC

0.3VCC

Figure 4. AC Testing Input Output Waveforms

6/16

ST24E64, ST25E64