This feature is suited for sink devices requiring high power charging profile above 5 V to be fully operational (see

Section 6.1.2 Powering a system under high charging profile only).

VBUS_EN_SNK pin is a high voltage open drain output that allows a PMOS transistor to be directly driven to

2.2.11

A_B_SIDE

This output pin provides the cable orientation. It is used to establish USB SuperSpeed signal routing. This signal

is not required in case of USB 2.0 support.

Value

Description

HiZ

CC1 pin is attached to CC line

0

CC2 pin is attached to CC line

2.2.12

VBUS_VS_DISCH

receptacle side.

A serial resistor connected to the pin must be used to limit the discharge current through the pin. Maximum

discharge current is 50 mA.

The discharge is activated automatically during cable disconnection, transition to a lower PDO voltage, hard reset

and error recovery state. The discharge time is programmable by NVM (see Section 5 Start-up configuration).

2.2.13

VREG_1V2

This pin is used only for external decoupling of the 1.2 V internal regulator. The recommended decoupling

capacitor is: 1 µF typ. (0.5 µF min., 10 µF max.)

2.2.14

VSYS

This is the low power supply from the system, if there is any. It can be connected directly to a single cell Lithium

battery or to the system power supply delivering 3.3 V or 5 V. It is recommended to connect the pin to ground

when it is not used.

2.2.15

VREG_2V7

This pin is used only for external decoupling of the 2.7 V internal regulator. The recommended decoupling

capacitor is: 1 µF typ. (0.5 µF min., 10 µF max.)

2.2.16

VDD

STUSB4500

Pin description

DS12499 - Rev 2

page 9/41