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STV8207 数据表(PDF) 80 Page - STMicroelectronics |
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STV8207 数据表(HTML) 80 Page - STMicroelectronics |
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80 / 149 page ![]() Register List STV82x7 80/149 I2S_IN_CONFIG I²S Configuration Register AV_DELAY Audio/Video Delay Register TEST_MODE[5:4] 00 0: standard configuration 1: bypass processing configuration 2: Clock Loop test Bits[3:2] 00 Reserved HOST_ NO_INIT 0 0: I2C register table is initialized when we soft reset 1: I2C register table is not initialized when we soft reset HOST_RUN 0 0: soft reset DSP 1: start DSP processing Address: 86h Type: R/W Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 LOCK_MODE _EN 0 SYNC LRCLK_START LRCLK_ POLARITY SCLK_ POLARITY DATA_CFG I2S_MODE Bit Name Reset Function LOCK_MODE_EN 1 0: Disable Lock Mode for external I2S input 1: Enable Lock Mode for external I2S input Bit 6 0 Reserved. SYNC 0 I2S synchronisation: 0: Capture directly 1: Wait for synchro LRCLK_START 0 according to LRCLK POLARITY, first data take: 0: Left 1: Right LRCLK_POLARITY 0 Polarity of the left data SCLK_POLARITY 1 0: Falling edge 1: Rising edge DATA_CFG 1 0: LSB First 1: MSB First I2S_MODE 0 0: Non standard mode 1: Standard mode (Refer to Figure 26) Address: 89h Type: R/W Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 DELAY_TIME DELAY_ON Bit Name Reset Function |
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