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M41T62 数据表(PDF) 10 Page - STMicroelectronics |
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M41T62 数据表(HTML) 10 Page - STMicroelectronics |
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10 / 42 page ![]() 2.3 WRITE mode In this mode the master transmitter transmits to the M41T6x slave receiver. Bus protocol is shown in Figure 16. WRITE mode sequence. Following the START condition and slave address, a logic '0' (R/W̅=0) is placed on the bus and indicates to the addressed device that word address “An” will follow and is to be written to the on-chip address pointer. The data word to be written to the memory is strobed in next and the internal address pointer is incremented to the next address location on the reception of an acknowledge clock. The M41T6x slave receiver will send an acknowledge clock to the master transmitter after it has received the slave address see Figure 13. Slave address location and again after it has received the word address and each data byte. Figure 16. WRITE mode sequence BUS ACTIVITY: S P SDA LINE BUS ACTIVITY: MASTER DATA n DATA n+1 DATA n+X WORD ADDRESS (An) SLAVE ADDRESS M41T62, M41T64, M41T65 WRITE mode DS3840 - Rev 24 page 10/42 |
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