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PCF2129AT 数据表(PDF) 8 Page - NXP Semiconductors |
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PCF2129AT 数据表(HTML) 8 Page - NXP Semiconductors |
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8 / 86 page  xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx Table 5. Register overview Bit positions labeled as - are not implemented and return 0 when read. Bits labeled as T must always be written with logic 0. Bits labeled as X are undefined at power-on and unchanged by subsequent resets. Address Register name Bit Reset value Reference 7 6 5 4 3 2 1 0 Control registers 00h Control_1 EXT_ TEST TSTOP TSF1 POR_ OVRD 12_24 MI SI 0000 1000 Table 7 on page 10 01h Control_2 MSF WDTF TSF2 AF T TSIE AIE T 0000 0000 Table 9 on page 11 02h Control_3 PWRMNG[2:0] BTSE BF BLF BIE BLIE 0000 0000 Table 11 on page 12 Time and date registers 03h Seconds OSF SECONDS (0 to 59) 1XXX XXXX Table 22 on page 25 04h Minutes - MINUTES (0 to 59) - XXX XXXX Table 25 on page 26 05h Hours - - AMPM HOURS (1 to 12) in 12-hour mode - - XX XXXX Table 27 on page 27 HOURS (0 to 23) in 24-hour mode - - XX XXXX 06h Days - - DAYS (1 to 31) - - XX XXXX Table 29 on page 27 07h Weekdays ---- - WEEKDAYS (0 to 6) - - - - - XXX Table 31 on page 28 08h Months - - - MONTHS (1 to 12) - - - X XXXX Table 34 on page 29 09h Years YEARS (0 to 99) XXXX XXXX Table 37 on page 30 Alarm registers 0Ah Second_alarm AE_S SECOND_ALARM (0 to 59) 1XXX XXXX Table 39 on page 33 0Bh Minute_alarm AE_M MINUTE_ALARM (0 to 59) 1XXX XXXX Table 41 on page 33 0Ch Hour_alarm AE_H - AMPM HOUR_ALARM (1 to 12) in 12-hour mode 1 - XX XXXX Table 43 on page 34 HOUR_ALARM (0 to 23) in 24-hour mode 1 - XX XXXX 0Dh Day_alarm AE_D - DAY_ALARM (1 to 31) 1 - XX XXXX Table 45 on page 34 0Eh Weekday_alarm AE_W - - - - WEEKDAY_ALARM (0 to 6) 1 - - - - XXX Table 47 on page 35 CLKOUT control register 0Fh CLKOUT_ctl TCR[1:0] OTPR - - COF[2:0] 00X - - 000 Table 13 on page 12 Watchdog registers 10h Watchdg_tim_ctl WD_CD T TI_TP - - - TF[1:0] 000 - - - 11 Table 49 on page 36 11h Watchdg_tim_val WATCHDG_TIM_VAL[7:0] XXXX XXXX Table 51 on page 36 Timestamp registers 12h Timestp_ctl TSM TSOFF - 1_O_16_TIMESTP[4:0] 00 - X XXXX Table 58 on page 41 |
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