AM29DL642G datasheet(32/54 Pages) AMD

32 / 54 page

Am29DL642G

June 10, 2005

PRELIMINARY

Table 13.

Am29DL642G Command Definitions

Legend:

X = Don’t care

RA = Address of the memory location to be read.

RD = Data read from location RA during read operation.

PA = Address of the memory location to be programmed. Addresses

latch on the falling edge of the WE# or CE# pulse, whichever happens

later.

PD = Data to be programmed at location PA. Data latches on the rising

edge of WE# or CE# pulse, whichever happens first.

SA = Address of the sector to be verified (in autoselect mode) or

erased. Address bits A21–A12 uniquely select any sector. Refer to

Table 2 for information on sector addresses.

BA = Address of the bank that is being switched to autoselect mode, is

in bypass mode, or is being erased. A21–A19 uniquely select a bank.

Notes:

See Table 1 for description of bus operations.

All values are in hexadecimal.

Except for the read cycle and the fourth cycle of the autoselect

command sequence, all bus cycles are write cycles.

Data bits DQ15–DQ8 are don’t care in command sequences,

except for RD and PD.

Unless otherwise noted, address bits A21–A11 are don’t cares for

unlock and command cycles, unless SA or PA is required.

No unlock or command cycles required when bank is reading

array data.

The Reset command is required to return to the read mode (or to

the erase-suspend-read mode if previously in Erase Suspend)

when a bank is in the autoselect mode, or if DQ5 goes high (while

the bank is providing status information).

The fourth cycle of the autoselect command sequence is a read

cycle. The system must provide the bank address to obtain the

manufacturer ID, device ID, or SecSi Sector factory protect

information. Data bits DQ15–DQ8 are don’t care. See the

Autoselect Command Sequence section for more information.

The device ID must be read across the fourth, fifth, and sixth

cycles.

10. The data is 80h for factory locked and 00h for not factory locked.

11. The data is 00h for an unprotected sector/sector block and 01h for

a protected sector/sector block.

12. The Unlock Bypass command is required prior to the Unlock

Bypass Program command.

13. The Unlock Bypass Reset command is required to return to the

read mode when the bank is in the unlock bypass mode.

14. The system may read and program in non-erasing sectors, or

enter the autoselect mode, when in the Erase Suspend mode.

The Erase Suspend command is valid only during a sector erase

operation, and requires the bank address.

15. The Erase Resume command is valid only during the Erase

Suspend mode, and requires the bank address.

16. Command is valid when device is ready to read array data or when

device is in autoselect mode.

Command

Sequence

(Note 1)

Bus Cycles (Notes 2–5)

First

Second

Third

Fourth

Fifth

Sixth

Addr

Data

Addr

Data

Addr

Data

Addr

Data

Addr

Data

Addr

Data

Read (Note 6)

Reset (Note 7)

XXX

Manufacturer ID

555

2AA

(BA)555

(BA)X00

Device ID (Note 9)

555

2AA

(BA)555

(BA)X01

(BA)X0E

(BA)X0F

SecSi Sector Factory Protect

(Note 10)

555

2AA

(BA)555

(BA)X03 80/00

Sector/Sector Block Protect

Verify (Note 11)

555

2AA

(BA)555

(SA)X02 00/01

Enter SecSi Sector Region

555

2AA

555

Exit SecSi Sector Region

555

2AA

555

XXX

Program

555

2AA

555

Unlock Bypass

555

2AA

555

Unlock Bypass Program (Note 12)

XXX

Unlock Bypass Reset (Note 13)

XXX

Chip Erase

555

2AA

555

2AA

555

Sector Erase

555

2AA

555

2AA

Erase Suspend (Note 14)

Erase Resume (Note 15)

CFI Query (Note 16)

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