MIMX8DX2AVOFZAC datasheet(39/151 Pages) NXP

39 / 151 page

Electrical characteristics

i.MX 8QuadXPlus and 8DualXPlus Automotive and Infotainment Applications Processors, Rev. 2, 03/2020

NXP Semiconductors

4.5.2.2

Dual-voltage GPIO DC parameters

The following two tables show dual-voltage 1.8 V and 3.3 V DC parameters, respectively, for GPIO

pads. These parameters are guaranteed per the operating ranges in Table 10, unless otherwise noted.

2 Overshoot and undershoot conditions (transitions above OVDD and below GND) on switching pads must be held below 0.3 V,

and the duration of the overshoot/undershoot must not exceed 10% of the system clock cycle. Overshoot/ undershoot must

be controlled through printed circuit board layout, transmission line impedance matching, signal line termination, or other

methods. Noncompliance to this specification may affect device reliability or cause permanent damage to the device. (OVDD

is the I/O Supply.)

3 DSE is the setting of the PDRV register. High Drive mode recommended for 3v3 and 2v5 modes. Low Drive mode is

recommended for 1v8 mode.

4 To maintain a valid level, the transition edge of the input must sustain a constant slew rate (monotonic) from the current DC

level through to the target DC level, VIL or VIH. Monotonic input transition time is from 0.1 ns to 1 ns.

Table 32. Dual-voltage 1.8 V GPIO DC parameters

Parameter

Symbol

Test Conditions

Min

Max

Units

High-level output voltage1,2

1 Overshoot and undershoot conditions (transitions above OVDD and below GND) on switching pads must be held below 0.3 V,

and the duration of the overshoot/undershoot must not exceed 10% of the system clock cycle. Overshoot/undershoot must be

controlled through printed circuit board layout, transmission line impedance matching, signal line termination, or other

methods. Noncompliance to this specification may affect device reliability or cause permanent damage to the device. (OVDD

is the IO Supply.)

2 DSE is the setting of the PDRV register. High Drive mode is recommended for SD standard (3v3 mode) and MMC standard

(1v8/3v3 modes). Low Drive mode is recommended for SD standard (1v8 mode).

VOH

Ioh= -0.1mA

DSE=1

0.8

× OVDD

—

Ioh= -2mA

DSE=0

Low-level output voltage1,2

VOL

Iol= -0.1mA

DSE=1

—

0.125

× OVD

Iol= -2mA

DSE=0

High-Level input voltage1,3

3 To maintain a valid level, the transition edge of the input must sustain a constant slew rate (monotonic) from the current DC

level through to the target DC level, Vil or Vih. Monotonic input transition time is from 0.1 ns to 1 ns.

VIH

—0.625

× OVD

OVDD

Low-Level input voltage

VIL

—

0.25

× OVDD

Pull-up resistance

RPU

Vin=0 V (Pullup Resistor)

PUN = "L", PDN = "H"

Pull-down resistance

Rdown Vin=OVDD( Pulldown Resistor)

PUN = "H", PDN = "L"

Input current (no PU/PD)

IIN

VI = 0, VI = OVDD

PUN = "H", PDN = "H"

-1

μA

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