HMA82GS6AFR8N-TF datasheet(41/73 Pages) HYNIX

41 / 73 page

Rev. 1.4 / Sep.2017

Single-ended AC & DC Output Levels of Connectivity Test Mode

Following output parameters will be applied for DDR4 SDRAM Output Signal during Connectivity Test

Mode.

NOTE :

1. The effective test load is 50

 terminated by VTT = 0.5 * VDDQ.

Differential Output Slew Rate Definition of Connectivity Test Mode

Single-ended AC & DC output levels of Connectivity Test Mode

Symbol Parameter

DDR4-1600/1866/2133/

2400/2666/3200

Unit Note

VOH(DC) DC output high measurement level (for IV curve linearity)

1.1 x VDDQ

VOM(DC) DC output mid measurement level (for IV curve linearity)

0.8 x VDDQ

VOL(DC) DC output low measurement level (for IV curve linearity)

0.5 x VDDQ

VOB(DC) DC output below measurement level (for IV curve linearity)

0.2 x VDDQ

VOH(AC) AC output high measurement level (for output SR)

VTT + (0.1 x VDDQ)V

VOL(AC) AC output below measurement level (for output SR)

VTT - (0.1 x VDDQ)V

Single-ended output slew rate of Connectivity Test Mode

Parameter

Symbol

DDR4-1600/1866/2133/2400/2666/3200

Unit Note

Min

Max

Output signal Falling time TF_output_CT

ns/V

Output signal Rising time TR_output_CT

ns/V

VOH(AC)

TR_output_CT

VTT

0.5 * VDDQ

VOL(AC)

TF_output_CT

HMA82GS6AFR8N-TF 数据表(PDF) 41 Page - Hynix Semiconductor

HMA82GS6AFR8N-TF 数据表(HTML) 41 Page - Hynix Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73

数据表下载