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WM8742GEDS/RV 数据表(PDF) 28 Page - Cirrus Logic |
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WM8742GEDS/RV 数据表(HTML) 28 Page - Cirrus Logic |
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28 / 66 page ![]() WM8742 28 Rev 4.4 DSD DIGITAL AUDIO INTERFACE DSD audio data is input to the WM8742 via the DSD digital audio interface. Two interface formats are supported: Uni-phase Bi-phase To use this interface apply left data on input pin 1 (LRCLK/DSDL) and pin 22 (OSR/DSDR). A DSD clock is also required, running at 64FS, and should be applied to pin 3 (BCLK/DSD64CLK). L3 DSDCLK64 DSDL 64/fs L0 L1 L2 R3 DSDR R0 R1 R2 Figure 22 Uni-phase DSD Mode Timing Diagram L3 DSDCLK64 DSDL 64/fs L0 L1 L1 L2 L2 R3 DSDR R0 R1 R1 R2 R2 Figure 23 Bi-phase DSD Mode Timing Diagram |
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