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IS25LP032D-RGLA3 数据表(PDF) 18 Page - Integrated Silicon Solution, Inc

部件名 IS25LP032D-RGLA3
功能描述  SERIAL FLASH MEMORY WITH 133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE
PDF  118 Pages
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制造商  ISSI [Integrated Silicon Solution, Inc]
网页  http://www.issi.com
标志 ISSI - Integrated Silicon Solution, Inc

IS25LP032D-RGLA3 数据表(HTML) 18 Page - Integrated Silicon Solution, Inc

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IS25LP032D
IS25WP032D
Integrated Silicon Solution, Inc.- www.issi.com
18
Rev. A12
08/04/2020
Table 5.3 JEDEC
Basic Flash Parameter Table (Continued)
Description
Address
(Byte)
Address
(Bit)
Data
Multiplier from typical time to maximum time for page or byte
PROGRAM
58h
3:0
0010b
Page size
7:4
1000b
Page Program Typical time
5Ah:59h
12:8
11000b
13
0b
Byte Program Typical time, first byte
17:14
0111b
18
0b
Byte Program Typical time, additional byte
22:19
0000b
23
0b
Chip Erase, Typical time
5Bh
28:24
00001b
Units
30:29
10b
Reserved
31
1b
Prohibited Operations During Program Suspend
5Ch
3:0
1100b
Prohibited Operations During Erase Suspend
7:4
1110b
Reserved
5Eh:5Dh
8
1b
Program Resume to Suspend Interval
12:9
0110b
Suspend in-progress program max latency
17:13
01100b
19:18
10b
Erase Resume to Suspend Interval
23:20
0110b
Suspend in-progress erase max latency
5Fh
28:24
01100b
30:29
10b
Suspend /Resume supported
31
0b
Program Resume Instruction
60h
7:0
7Ah
Program Suspend Instruction
61h
15:8
75h
Resume Instruction
62h
23:16
7Ah
Suspend Instruction
63h
31:24
75h
Reserved
64h
1:0
11b
Status Register Polling Device Busy
7:2
111101b



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