IS25LP064A-RBLA2 datasheet(75/99 Pages) ISSI

75 / 99 page

IS25LP064A/032A

Integrated Silicon Solution, Inc.- www.issi.com

Rev. A

11/06/2015

8.38 FAST READ QUAD IO DTR MODE OPERATION (FRQDTR, EDh)

The FRQDTR instruction enables Double Transfer Rate throughput on quad I/O of the device in read mode. The

address (interleave on 4 I/O pins) is latched on both rising and falling edge of SCK, and data (interleave on 4 I/O

pins) shift out on both rising and falling edge of SCK at a maximum frequency fQ2. The 8-bit address can be

latched-in at one clock, and 8-bit data can be read out at one clock, which means four bits at the rising edge of

clock, the other four bits at the falling edge of clock.

The first address byte can be at any location. The address is automatically increased to the next higher address

after each byte data is shifted out, so the whole memory can be read out with a single FRQDTR instruction. The

address counter rolls over to 0 when the highest address is reached. Once writing FRQDTR instruction, the

following address/dummy/data out will perform as 8-bit instead of previous 1-bit.

The sequence of issuing FRQDTR instruction is: CE# goes low  Sending FRQDTR instruction (1-bit per clock)

 24-bit address interleave on IO3, IO2, IO1 & IO0 (8-bit per clock)  3 dummy clocks (configurable, default is

3 clocks)  Data out interleave on IO3, IO2, IO1 & IO0 (8-bit per clock)  End FRQDTR operation by driving

CE# high at any time during data out.

If AXh (

where X is don’t care) is input for the mode bits during dummy cycles, the device will enter AX read

operation mode which enables subsequent FRQDTR execution skips command code. It saves cycles as

described in Figure 8.60. When the code is different from AXh, the device exits the AX read operation. After

finishing the read operation, device becomes ready to receive a new command.

If the FRQDTR instruction is issued while a Program/Erase/Write Status Register cycle is in progress (WIP=1),

the instruction will be rejected without any effect on the current cycle.

IS25LP064A-RBLA2 数据表(PDF) 75 Page - Integrated Silicon Solution, Inc