Control Voltage (V)

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

0.5

1

1.5

2

2.5

3

3.5

4

D013

Control Voltage (V)

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

0

20

40

60

80

100

D014

Modulation

Input

(see Note A)

CONT

TRIG

RESET

OUT

DISCH

C

GND

THRES

4

8

3

7

6

2

5

Output

23

TLC555

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SLFS043I – SEPTEMBER 1983 – REVISED JULY 2019

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Copyright © 1983–2019, Texas Instruments Incorporated

Typical Applications (continued)

A.

The modulating signal can be direct or capacitively coupled to CONT. For direct coupling, consider the effects of

modulation source voltage and impedance on the bias of the timer.

C = 1 nF

Figure 22. Circuit for Pulse-Position Modulation

8.2.3.1 Design Requirements

Both DC- and AC-coupled modulation input changes the upper and lower voltage thresholds for the timing

capacitor. Both frequency and duty cycle vary with the modulation voltage. Control voltage below 1 V could result

in output glitches instead of a steady output pulse stream

8.2.3.2 Detailed Design Procedure

formulas in Astable Operation section.

8.2.3.3 Application Curves

Figure 23. Pulse-Position-Modulation Frequency

Figure 24. Pulse-Position-Modulation Duty Cycle