PCF8564A datasheet(58/59 Pages) NXP

58 / 59 page

PCA85063A

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Product data sheet

Rev. 4 — 30 March 2018

58 of 59

NXP Semiconductors

PCA85063A

Automotive Real-Time Clock/calendar with alarm function and I2C-bus

28. Figures

Fig 1.

Block diagram of PCA85063A . . . . . . . . . . . . . . . .2

Fig 2.

Pin configuration for TSSOP8 (PCA85063ATT) . .3

Fig 3.

Handling address registers . . . . . . . . . . . . . . . . . .4

Fig 4.

STOP bit functional diagram . . . . . . . . . . . . . . . . .8

Fig 5.

STOP bit release timing . . . . . . . . . . . . . . . . . . . . .9

Fig 6.

Software reset command . . . . . . . . . . . . . . . . . . .10

Fig 7.

Interrupt scheme . . . . . . . . . . . . . . . . . . . . . . . . .12

Fig 8.

INT example for MI . . . . . . . . . . . . . . . . . . . . . . .13

Fig 9.

Offset calibration calculation workflow . . . . . . . . .18

Fig 10. Result of offset calibration . . . . . . . . . . . . . . . . . .19

Fig 11. OS flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20

Fig 12. Data flow for the time function . . . . . . . . . . . . . . .23

Fig 13. Access time for read/write operations . . . . . . . . .24

Fig 14. Alarm function block diagram. . . . . . . . . . . . . . . .27

Fig 15. General countdown timer behavior . . . . . . . . . . .29

Fig 16. Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31

Fig 17. Definition of START and STOP conditions. . . . . .31

Fig 18. System configuration . . . . . . . . . . . . . . . . . . . . . .32

Fig 19. Acknowledgement on the I2C-bus . . . . . . . . . . . .32

Fig 20. Master transmits to slave receiver

(WRITE mode) . . . . . . . . . . . . . . . . . . . . . . . . . . .33

Fig 21. Master reads after setting register address

(write register address; READ data) . . . . . . . . . .34

Fig 22. Device diode protection diagram of PCA85063A.35

Fig 23. Typical IDD with respect to fSCL . . . . . . . . . . . . . .38

Fig 24. Typical IDD as a function of temperature . . . . . . .39

Fig 25. Typical IDD with respect to VDD . . . . . . . . . . . . . .40

Fig 26. IDD with respect to quartz RS . . . . . . . . . . . . . . . .41

Fig 27. Oscillator frequency variation with respect

to VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41

Fig 28. I2C-bus timing diagram; rise and fall times refer

to 30 % and 70 % . . . . . . . . . . . . . . . . . . . . . . . .43

Fig 29. Application diagram for PCA85063A . . . . . . . . . .44

Fig 30. Package outline SOT505-1 (TSSOP8) of

PCA85063ATT . . . . . . . . . . . . . . . . . . . . . . . . . . .45

Fig 31. Temperature profiles for large and small

components . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49

Fig 32. Footprint information for reflow soldering of

SOT505-1 (TSSOP8) of PCA85063ATT . . . . . . .49

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