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ST7LITE30 数据表(PDF) 118 Page - STMicroelectronics |
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ST7LITE30 数据表(HTML) 118 Page - STMicroelectronics |
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118 / 167 page  ST7LITE3 118/167 LINSCI ™ SERIAL COMMUNICATION INTERFACE (LIN Master/Slave) (Cont’d) Table 20. LINSCI1 Register Map and Reset Values Addr. (Hex.) Register Name 7 6 5 4 3 2 1 0 40 SCISR Reset Value TDRE 1 TC 1 RDRF 0 IDLE 0 OR/LHE 0 NF 0 FE 0 PE 0 41 SCIDR Reset Value DR7 - DR6 - DR5 - DR4 - DR3 - DR2 - DR1 - DR0 - 42 SCIBRR LPR (LIN Slave Mode) Reset Value SCP1 LPR7 0 SCP0 LPR6 0 SCT2 LPR5 0 SCT1 LPR4 0 SCT0 LPR3 0 SCR2 LPR2 0 SCR1 LPR1 0 SCR0 LPR0 0 43 SCICR1 Reset Value R8 x T8 0 SCID 0 M 0 WAKE 0 PCE 0 PS 0 PIE 0 44 SCICR2 Reset Value TIE 0 TCIE 0 RIE 0 ILIE 0 TE 0 RE 0 RWU 0 SBK 0 45 SCICR3 Reset Value NP 0 LINE 0 LSLV 0 LASE 0 LHDM 0 LHIE 0 LHDF 0 LSF 0 46 SCIERPR LHLR (LIN Slave Mode) Reset Value ERPR7 LHL7 0 ERPR6 LHL6 0 ERPR5 LHL5 0 ERPR4 LHL4 0 ERPR3 LHL3 0 ERPR2 LHL2 0 ERPR1 LHL1 0 ERPR0 LHL0 0 47 SCITPR LPFR (LIN Slave Mode) Reset Value ETPR7 LDUM 0 ETPR6 0 0 ETPR5 0 0 ETPR4 0 0 ETPR3 LPFR3 0 ETPR2 LPFR2 0 ETPR1 LPFR1 0 ETPR0 LPFR0 0 |
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