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TPS70950DBVT 数据表(PDF) 14 Page - Texas Instruments |
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TPS70950DBVT 数据表(HTML) 14 Page - Texas Instruments |
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14 / 39 page ![]() TPS709 SBVS186G – MARCH 2012 – REVISED NOVEMBER 2015 www.ti.com Feature Description (continued) 7.3.3 Undervoltage Lockout (UVLO) The TPS709 uses an undervoltage lockout (UVLO) circuit to keep the output shut off until the internal circuitry operates properly. 7.3.4 Reverse-Current Protection The TPS709 has integrated reverse-current protection. Reverse-current protection prevents the flow of current from the OUT pin to the IN pin when output voltage is higher than input voltage. The reverse-current protection circuitry places the power path in high impedance when the output voltage is higher than the input voltage. This setting reduces leakage current from the output to the input to 10 nA, typical. The reverse current protection is always active regardless of the enable pin logic state or if the OUT pin voltage is greater than 1.8 V. Reverse current can flow if the output voltage is less than 1.8 V and if input voltage is less than the output voltage. If voltage is applied to the input pin, then the maximum voltage that can be applied to the OUT pin is the lower of three times the nominal output voltage or 6.5 V. For example, if the 1.2-V output voltage version is used, then the maximum reverse bias voltage that can be applied to the OUT pin is 3.6 V. If the 5.0-V output voltage version is used, then the maximum reverse bias voltage that can be applied to the OUT pin is 6.5 V. 7.4 Device Functional Modes The TPS709 has the following functional modes: 1. Enabled: When the enable pin (EN) goes above 0.9 V, the device is enabled. EN is pulled high by a 300-nA current source; therefore, EN can be left floating to enable the device. Do not connect EN to VIN. The EN pin is clamped by a 6.5-V Zener diode. Do not exceed the 7-V absolute maximum rating on the enable pin or excessive current flowing into the Zener clamp will destroy the device. 2. Disabled: When EN goes below 0.4 V, the device is disabled. During this time, OUT is high impedance and the current into IN (I(SHUTDOWN)) is typically 150 nA. 14 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TPS709 |
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