 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
R5F572TFFDFP 数据表(PDF) 1 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
R5F572TFFDFP 数据表(HTML) 1 Page - Renesas Technology Corp |
|
|
1 / 176 page  RX72T Group Renesas MCUs Datasheet R01DS0331EJ0100 Rev.1.00 Page 1 of 176 Feb 08, 2019 Features ■ 32-bit RXv3 CPU core Maximum operating frequency: 200 MHz Capable of 1160 CoreMark in operation at 200 MHz JTAG and FINE (one-line) debugging interfaces A function for collectively saving the values of registers is available. ■ Low-power design and architecture Operation from a single 2.7- to 5.5-V supply Four low-power modes ■ On-chip code flash memory Supports versions with 1 Mbytes/512 Kbytes No wait cycles at up to 120 MHz or when the ROM cache is hit User code is programmable by on-board or off-board programming. ■ On-chip data flash memory 32 Kbytes, reprogrammable up to 100,000 times Programming/erasing as background operations (BGOs) ■ On-chip SRAM, no wait states 128Kbytes of SRAM (no wait states) 16 Kbytes of RAM with ECC (with wait) ■ Data transfer DMACa: 8 channels DTCa: 1 channel ■ ELC Module operation can be initiated by event signals without using interrupts Linked operation between modules is possible when the CPU is in sleep mode ■ Reset and supply management Power-on reset (POR) Low voltage detection (LVDA) with voltage settings ■ Clock functions Frequency of resonator for main clock oscillator: 8 to 24 MHz (this can be used as the PLL reference clock) High-speed on-chip oscillator: 16 MHz/18 MHz/20 MHz (this can be used as the PLL reference clock) Low-speed on-chip oscillator: 240 kHz ■ Independent watchdog timer 120-kHz IWDT-dedicated on-chip oscillator clock operation ■ Useful functions for IEC60730 compliance Oscillation-stoppage detection, functions for self-diagnosis and detection of disconnection for the A/D converter, clock frequency accuracy measurement circuit, independent watchdog timer, RAM test-assisting function by DOC, and CRCA, etc. Register write protection function can protect values in important registers against overwriting. ■ External bus Bus clock at 40 MHz (max) Four CS areas 8- or 16-bit bus space is selectable per area ■ Various communications interfaces Host/function or OTG controller (1 channel) with full-speed USB 2.0 (USBb) transfer CAN (compliant with ISO11898-1), incorporating 32 mailboxes (1 channel) SCIj and SCIh with multiple functionalities (up to 6 channels) Choose from among asynchronous mode, clock-synchronous mode, smart-card interface mode, simplified SPI, simplified I2C, and extended serial mode. SCIi with 16-byte transmission and reception FIFOs (1 channel) I2C bus interface (RIICa) for transfer at up to 400 kbps (fast mode), capable of SMBus operation (1 channel) RSPId (1 channel) for transfer at up to 30 Mbps ■ Up to 31 extended-function timers 32-bit GPTW (10 channels): operation at 200 MHz, input capture, output compare, PWM waveforms: 10 output channels in single- phase complementary PWM mode/3 output channels in 3-phase complementary PWM mode/2 output channels in 5-phase complementary PWM mode, phase-counting mode, linkage with comparator (counting operation, PWM negate control) 16-bit MTU3d (9 channels): operation at 200 MHz, input capture, output compare, PWM waveforms: 2 output channels in 3-phase complementary PWM mode, phase-counting mode 8-bit TMR (8 channels) 16-bit CMT (4 channels) ■ High-resolution PWM waveform generation circuit (HRPWM): 4 channels Controlling the timing of rising or falling of the PWM output waveform for 32-bit GPTW is realized with minimum of 195 ps resolution (in operation at 160 MHz) ■ 12-bit A/D converter (S12ADH): total of 30 channels for three units Up to three 12-bit units of sample-and-hold circuit included Unit 0 (8 channels for 3 sample-and-hold circuits), Unit 1 (8 channels for 3 sample-and-hold circuits), Unit 2 (14 channels) Programmable gain amplifier with pseudo differential amplification (3 channels × 2) ■ Analog Comparator (CMPC): 6 channels ■ 12-bit D/A converter: 2 channels Usable as a reference voltage for the analog comparator ■ Temperature sensor for measuring temperature within the chip ■ Encryption functions (Trusted Secure IP Lite) 128- or 256-bit key length of AES for ECB, CBC, GCM, others True random number generator Unauthorized access to the encryption engine is disabled and imposture and falsification of information are prevented Safe management of keys ■ Up to 110 pins for general I/O ports 5-V tolerance, open drain, input pull-up, switchable driving ability ■ Recommended operating temp. range (Topr) –40C to +85C –40C to +105C PLQP0144KA-B 20 × 20 mm, 0.5 mm pitch PLQP0100KB-B 14 × 14 mm, 0.5 mm pitch 200-MHz, 32-bit RX MCU, on-chip FPU, 1160 CoreMark, Supportive of 5V power supply, up to 1-MB flash memory, 128-KB SRAM, 32-KB data flash memory, 16-KB SRAM with ECC, Simultaneous sampling with 3 units of 12-bit A/D converter (up to 7 channels), Single-end/pseudo differential input supportive amplifier (6 channels), Analog comparator (6 channels), 200 MHz PWM (4 channels for 3-phase complementary, 2 channels for 5-phase complementary, 10 channels for single-phase complementary), 4-channel high-resolution PWM with resolution of 195 ps at the minimum, Host/function or OTG controller with full-speed USB 2.0 transfer, CAN, Encryption functions (optional) R01DS0331EJ0100 Rev.1.00 Feb 08, 2019 Features |
类似零件编号 - R5F572TFFDFP |
|
类似说明 - R5F572TFFDFP |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
